prj to mdks

apps/boot/boot.uvprojx

@@ -16,7 +16,7 @@
         <TargetCommonOption>
           <Device>STM32F405RGTx</Device>
           <Vendor>STMicroelectronics</Vendor>
-          <PackID>Keil.STM32F4xx_DFP.3.1.0</PackID>
+          <PackID>Keil.STM32F4xx_DFP.2.17.1</PackID>
           <PackURL>https://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x10000000,0x00010000) IROM(0x08000000,0x00100000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -339,7 +339,7 @@
               <MiscControls></MiscControls>
               <Define>USE_HAL_DRIVER,STM32F405xx</Define>
               <Undefine></Undefine>
-              <IncludePath>..\libs\stm32f4\STM32F4_HAL\Inc;..\libs\stm32f4\STM32F4_HAL\Inc\Legacy;..\libs\stm32f4\STM32F4_CMSIS\Include;..\libs\cmsis-core\Include;..\apps\boot\include;..\apps\boot\bsp</IncludePath>
+              <IncludePath>..\..\libs\stm32f4\STM32F4_HAL\Inc;..\..\libs\stm32f4\STM32F4_HAL\Inc\Legacy;..\..\libs\stm32f4\STM32F4_CMSIS\Include;..\..\libs\cmsis-core\Include;.\application\include;.\board</IncludePath>
             </VariousControls>
           </Cads>
           <Aads>
@@ -361,16 +361,16 @@
             </VariousControls>
           </Aads>
           <LDads>
-            <umfTarg>1</umfTarg>
+            <umfTarg>0</umfTarg>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
             <noStLib>0</noStLib>
-            <RepFail>1</RepFail>
+            <RepFail>0</RepFail>
             <useFile>0</useFile>
             <TextAddressRange>0x08000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>
             <pXoBase></pXoBase>
-            <ScatterFile>.\Objects\boot.sct</ScatterFile>
+            <ScatterFile>.\linker_scripts\link.sct</ScatterFile>
             <IncludeLibs></IncludeLibs>
             <IncludeLibsPath></IncludeLibsPath>
             <Misc></Misc>
@@ -386,42 +386,42 @@
             <File>
               <FileName>main.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\apps\boot\main.c</FilePath>
+              <FilePath>.\application\main.c</FilePath>
             </File>
             <File>
               <FileName>main.h</FileName>
               <FileType>5</FileType>
-              <FilePath>..\apps\boot\include\main.h</FilePath>
+              <FilePath>.\application\include\main.h</FilePath>
             </File>
             <File>
               <FileName>stm32f4xx_hal_msp.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\apps\boot\stm32f4xx_hal_msp.c</FilePath>
+              <FilePath>.\application\stm32f4xx_hal_msp.c</FilePath>
             </File>
             <File>
               <FileName>stm32f4xx_hal_conf.h</FileName>
               <FileType>5</FileType>
-              <FilePath>..\apps\boot\include\stm32f4xx_hal_conf.h</FilePath>
+              <FilePath>.\application\include\stm32f4xx_hal_conf.h</FilePath>
             </File>
             <File>
               <FileName>stm32f4xx_it.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\apps\boot\stm32f4xx_it.c</FilePath>
+              <FilePath>.\application\stm32f4xx_it.c</FilePath>
             </File>
             <File>
               <FileName>stm32f4xx_it.h</FileName>
               <FileType>5</FileType>
-              <FilePath>..\apps\boot\include\stm32f4xx_it.h</FilePath>
+              <FilePath>.\application\include\stm32f4xx_it.h</FilePath>
             </File>
             <File>
               <FileName>system_stm32f4xx.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\apps\boot\system_stm32f4xx.c</FilePath>
+              <FilePath>.\application\system_stm32f4xx.c</FilePath>
             </File>
             <File>
               <FileName>startup_stm32f405xx.s</FileName>
               <FileType>2</FileType>
-              <FilePath>..\libs\stm32f4\STm32F4_CMSIS\Source\Templates\arm\startup_stm32f405xx.s</FilePath>
+              <FilePath>..\..\libs\stm32f4\STm32F4_CMSIS\Source\Templates\arm\startup_stm32f405xx.s</FilePath>
             </File>
           </Files>
         </Group>
@@ -431,7 +431,7 @@
             <File>
               <FileName>app_config.h</FileName>
               <FileType>5</FileType>
-              <FilePath>..\apps\boot\include\app_config.h</FilePath>
+              <FilePath>.\application\include\app_config.h</FilePath>
             </File>
           </Files>
         </Group>
@@ -441,37 +441,37 @@
             <File>
               <FileName>aes.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\apps\boot\func\aes.c</FilePath>
+              <FilePath>.\application\func\aes.c</FilePath>
             </File>
             <File>
               <FileName>app.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\apps\boot\func\app.c</FilePath>
+              <FilePath>.\application\func\app.c</FilePath>
             </File>
             <File>
               <FileName>transfer.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\apps\boot\func\transfer.c</FilePath>
+              <FilePath>.\application\func\transfer.c</FilePath>
             </File>
             <File>
               <FileName>firmware.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\apps\boot\func\firmware.c</FilePath>
+              <FilePath>.\application\func\firmware.c</FilePath>
             </File>
             <File>
               <FileName>ymodem.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\apps\boot\func\ymodem.c</FilePath>
+              <FilePath>.\application\func\ymodem.c</FilePath>
             </File>
             <File>
               <FileName>utils.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\apps\boot\func\utils.c</FilePath>
+              <FilePath>.\application\func\utils.c</FilePath>
             </File>
             <File>
               <FileName>no_semihosting.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\apps\boot\func\no_semihosting.c</FilePath>
+              <FilePath>.\application\func\no_semihosting.c</FilePath>
             </File>
           </Files>
         </Group>
@@ -481,72 +481,72 @@
             <File>
               <FileName>bsp_common.h</FileName>
               <FileType>5</FileType>
-              <FilePath>..\apps\boot\bsp\bsp_common.h</FilePath>
+              <FilePath>.\board\bsp_common.h</FilePath>
             </File>
             <File>
               <FileName>bsp_flash.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\apps\boot\bsp\bsp_flash.c</FilePath>
+              <FilePath>.\board\bsp_flash.c</FilePath>
             </File>
             <File>
               <FileName>bsp_flash.h</FileName>
               <FileType>5</FileType>
-              <FilePath>..\apps\boot\bsp\bsp_flash.h</FilePath>
+              <FilePath>.\board\bsp_flash.h</FilePath>
             </File>
             <File>
               <FileName>bsp_gpio.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\apps\boot\bsp\bsp_gpio.c</FilePath>
+              <FilePath>.\board\bsp_gpio.c</FilePath>
             </File>
             <File>
               <FileName>bsp_gpio.h</FileName>
               <FileType>5</FileType>
-              <FilePath>..\apps\boot\bsp\bsp_gpio.h</FilePath>
+              <FilePath>.\board\bsp_gpio.h</FilePath>
             </File>
             <File>
               <FileName>bsp_key.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\apps\boot\bsp\bsp_key.c</FilePath>
+              <FilePath>.\board\bsp_key.c</FilePath>
             </File>
             <File>
               <FileName>bsp_key.h</FileName>
               <FileType>5</FileType>
-              <FilePath>..\apps\boot\bsp\bsp_key.h</FilePath>
+              <FilePath>.\board\bsp_key.h</FilePath>
             </File>
             <File>
               <FileName>drv_timer.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\apps\boot\bsp\drv_timer.c</FilePath>
+              <FilePath>.\board\drv_timer.c</FilePath>
             </File>
             <File>
               <FileName>drv_timer.h</FileName>
               <FileType>5</FileType>
-              <FilePath>..\apps\boot\bsp\drv_timer.h</FilePath>
+              <FilePath>.\board\drv_timer.h</FilePath>
             </File>
             <File>
               <FileName>bsp_uart.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\apps\boot\bsp\bsp_uart.c</FilePath>
+              <FilePath>.\board\bsp_uart.c</FilePath>
             </File>
             <File>
               <FileName>bsp_uart.h</FileName>
               <FileType>5</FileType>
-              <FilePath>..\apps\boot\bsp\bsp_uart.h</FilePath>
+              <FilePath>.\board\bsp_uart.h</FilePath>
             </File>
             <File>
               <FileName>bsp_uart_config.h</FileName>
               <FileType>5</FileType>
-              <FilePath>..\apps\boot\bsp\bsp_uart_config.h</FilePath>
+              <FilePath>.\board\bsp_uart_config.h</FilePath>
             </File>
             <File>
               <FileName>bsp_uart_port.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\apps\boot\bsp\bsp_uart_port.c</FilePath>
+              <FilePath>.\board\bsp_uart_port.c</FilePath>
             </File>
             <File>
               <FileName>common.h</FileName>
               <FileType>5</FileType>
-              <FilePath>..\apps\boot\bsp\common.h</FilePath>
+              <FilePath>.\board\common.h</FilePath>
             </File>
           </Files>
         </Group>
@@ -556,82 +556,82 @@
             <File>
               <FileName>stm32f4xx_hal.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal.c</FilePath>
+              <FilePath>..\..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal.c</FilePath>
             </File>
             <File>
               <FileName>stm32f4xx_hal_cortex.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal_cortex.c</FilePath>
+              <FilePath>..\..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal_cortex.c</FilePath>
             </File>
             <File>
               <FileName>stm32f4xx_hal_dma.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal_dma.c</FilePath>
+              <FilePath>..\..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal_dma.c</FilePath>
             </File>
             <File>
               <FileName>stm32f4xx_hal_dma_ex.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal_dma_ex.c</FilePath>
+              <FilePath>..\..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal_dma_ex.c</FilePath>
             </File>
             <File>
               <FileName>stm32f4xx_hal_exti.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal_exti.c</FilePath>
+              <FilePath>..\..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal_exti.c</FilePath>
             </File>
             <File>
               <FileName>stm32f4xx_hal_flash.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal_flash.c</FilePath>
+              <FilePath>..\..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal_flash.c</FilePath>
             </File>
             <File>
               <FileName>stm32f4xx_hal_flash_ex.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal_flash_ex.c</FilePath>
+              <FilePath>..\..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal_flash_ex.c</FilePath>
             </File>
             <File>
               <FileName>stm32f4xx_hal_flash_ramfunc.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal_flash_ramfunc.c</FilePath>
+              <FilePath>..\..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal_flash_ramfunc.c</FilePath>
             </File>
             <File>
               <FileName>stm32f4xx_hal_gpio.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal_gpio.c</FilePath>
+              <FilePath>..\..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal_gpio.c</FilePath>
             </File>
             <File>
               <FileName>stm32f4xx_hal_pwr.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal_pwr.c</FilePath>
+              <FilePath>..\..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal_pwr.c</FilePath>
             </File>
             <File>
               <FileName>stm32f4xx_hal_pwr_ex.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal_pwr_ex.c</FilePath>
+              <FilePath>..\..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal_pwr_ex.c</FilePath>
             </File>
             <File>
               <FileName>stm32f4xx_hal_rcc.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal_rcc.c</FilePath>
+              <FilePath>..\..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal_rcc.c</FilePath>
             </File>
             <File>
               <FileName>stm32f4xx_hal_rcc_ex.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal_rcc_ex.c</FilePath>
+              <FilePath>..\..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal_rcc_ex.c</FilePath>
             </File>
             <File>
               <FileName>stm32f4xx_hal_tim.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal_tim.c</FilePath>
+              <FilePath>..\..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal_tim.c</FilePath>
             </File>
             <File>
               <FileName>stm32f4xx_hal_tim_ex.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal_tim_ex.c</FilePath>
+              <FilePath>..\..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal_tim_ex.c</FilePath>
             </File>
             <File>
               <FileName>stm32f4xx_hal_uart.c</FileName>
               <FileType>1</FileType>
-              <FilePath>..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal_uart.c</FilePath>
+              <FilePath>..\..\libs\stm32f4\STM32F4_HAL\Src\stm32f4xx_hal_uart.c</FilePath>
             </File>
           </Files>
         </Group>

apps/boot/linker_scripts/link.icf

@@ -0,0 +1,30 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__  = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__    = 0x0800FFFF;
+define symbol __ICFEDIT_region_RAM1_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM1_end__   = 0x2001FFFF;
+define symbol __ICFEDIT_region_RAM2_start__ = 0x10000000;
+define symbol __ICFEDIT_region_RAM2_end__   = 0x1000FFFF;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x0400;
+define symbol __ICFEDIT_size_heap__   = 0x000;
+/**** End of ICF editor section. ###ICF###*/
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM1_region     = mem:[from __ICFEDIT_region_RAM1_start__   to __ICFEDIT_region_RAM1_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM1_region  { readwrite, last block CSTACK };

apps/boot/linker_scripts/link.lds

@@ -0,0 +1,159 @@
+/*
+ * linker script for STM32F4xx with GNU ld
+ * bernard.xiong 2009-10-14
+ * flybreak      2018-11-19  Add support for RAM2
+ */
+
+/* Program Entry, set to mark it as "used" and avoid gc */
+MEMORY
+{
+    CODE (rx) : ORIGIN = 0x08000000, LENGTH = 64k /* 64KB flash */
+    RAM1 (rw) : ORIGIN = 0x20000000, LENGTH =  128k /* 128K sram */
+    RAM2 (rw) : ORIGIN = 0x10000000, LENGTH =   64k /* 64K sram */
+}
+ENTRY(Reset_Handler)
+_system_stack_size = 0x400;
+
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _stext = .;
+        KEEP(*(.isr_vector))            /* Startup code */
+
+        . = ALIGN(4);
+        *(.text)                        /* remaining code */
+        *(.text.*)                      /* remaining code */
+        *(.rodata)                      /* read-only data (constants) */
+        *(.rodata*)
+        *(.glue_7)
+        *(.glue_7t)
+        *(.gnu.linkonce.t*)
+
+        /* section information for finsh shell */
+        . = ALIGN(4);
+        __fsymtab_start = .;
+        KEEP(*(FSymTab))
+        __fsymtab_end = .;
+
+        . = ALIGN(4);
+        __vsymtab_start = .;
+        KEEP(*(VSymTab))
+        __vsymtab_end = .;
+
+        /* section information for initial. */
+        . = ALIGN(4);
+        __rt_init_start = .;
+        KEEP(*(SORT(.rti_fn*)))
+        __rt_init_end = .;
+
+        . = ALIGN(4);
+
+        PROVIDE(__ctors_start__ = .);
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        PROVIDE(__ctors_end__ = .);
+
+        . = ALIGN(4);
+
+        _etext = .;
+    } > CODE = 0
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    __exidx_start = .;
+    .ARM.exidx :
+    {
+        *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+
+        /* This is used by the startup in order to initialize the .data secion */
+        _sidata = .;
+    } > CODE
+    __exidx_end = .;
+
+    /* .data section which is used for initialized data */
+
+    .data : AT (_sidata)
+    {
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .data secion */
+        _sdata = . ;
+
+        *(.data)
+        *(.data.*)
+        *(.gnu.linkonce.d*)
+
+        PROVIDE(__dtors_start__ = .);
+        KEEP(*(SORT(.dtors.*)))
+        KEEP(*(.dtors))
+        PROVIDE(__dtors_end__ = .);
+
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .data secion */
+        _edata = . ;
+    } >RAM1
+
+    .stack :
+    {
+        . = ALIGN(4);
+        _sstack = .;
+        . = . + _system_stack_size;
+        . = ALIGN(4);
+        _estack = .;
+    } >RAM1
+
+    __bss_start = .;
+    .bss :
+    {
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .bss secion */
+        _sbss = .;
+
+        *(.bss)
+        *(.bss.*)
+        *(COMMON)
+
+        . = ALIGN(4);
+        /* This is used by the startup in order to initialize the .bss secion */
+        _ebss = . ;
+
+        *(.bss.init)
+    } > RAM1
+    __bss_end = .;
+
+    _end = .;
+
+    /* Stabs debugging sections.  */
+    .stab          0 : { *(.stab) }
+    .stabstr       0 : { *(.stabstr) }
+    .stab.excl     0 : { *(.stab.excl) }
+    .stab.exclstr  0 : { *(.stab.exclstr) }
+    .stab.index    0 : { *(.stab.index) }
+    .stab.indexstr 0 : { *(.stab.indexstr) }
+    .comment       0 : { *(.comment) }
+    /* DWARF debug sections.
+     * Symbols in the DWARF debugging sections are relative to the beginning
+     * of the section so we begin them at 0.  */
+    /* DWARF 1 */
+    .debug          0 : { *(.debug) }
+    .line           0 : { *(.line) }
+    /* GNU DWARF 1 extensions */
+    .debug_srcinfo  0 : { *(.debug_srcinfo) }
+    .debug_sfnames  0 : { *(.debug_sfnames) }
+    /* DWARF 1.1 and DWARF 2 */
+    .debug_aranges  0 : { *(.debug_aranges) }
+    .debug_pubnames 0 : { *(.debug_pubnames) }
+    /* DWARF 2 */
+    .debug_info     0 : { *(.debug_info .gnu.linkonce.wi.*) }
+    .debug_abbrev   0 : { *(.debug_abbrev) }
+    .debug_line     0 : { *(.debug_line) }
+    .debug_frame    0 : { *(.debug_frame) }
+    .debug_str      0 : { *(.debug_str) }
+    .debug_loc      0 : { *(.debug_loc) }
+    .debug_macinfo  0 : { *(.debug_macinfo) }
+    /* SGI/MIPS DWARF 2 extensions */
+    .debug_weaknames 0 : { *(.debug_weaknames) }
+    .debug_funcnames 0 : { *(.debug_funcnames) }
+    .debug_typenames 0 : { *(.debug_typenames) }
+    .debug_varnames  0 : { *(.debug_varnames) }
+}

apps/boot/linker_scripts/link.sct

@@ -0,0 +1,15 @@
+; *************************************************************
+; *** Scatter-Loading Description File generated by uVision ***
+; *************************************************************
+
+LR_IROM1 0x08000000 0x00010000  {    ; load region size_region
+  ER_IROM1 0x08000000 0x00010000  {  ; load address = execution address
+   *.o (RESET, +First)
+   *(InRoot$$Sections)
+   .ANY (+RO)
+  }
+  RW_IRAM1 0x20000000 0x00020000  {  ; RW data
+   .ANY (+RW +ZI)
+  }
+}
+

apps/chrg/board/linker_scripts/link.icf

@@ -2,10 +2,10 @@
 /*-Editor annotation file-*/
 /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
 /*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08010000;
+define symbol __ICFEDIT_intvec_start__ = 0x08040000;
 /*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__  = 0x08010000;
+define symbol __ICFEDIT_region_ROM_start__  = 0x08040000;
-define symbol __ICFEDIT_region_ROM_end__    = 0x0803FFFF;
+define symbol __ICFEDIT_region_ROM_end__    = 0x0807FFFF;
 define symbol __ICFEDIT_region_RAM1_start__ = 0x20000000;
 define symbol __ICFEDIT_region_RAM1_end__   = 0x2001FFFF;
 define symbol __ICFEDIT_region_RAM2_start__ = 0x10000000;

apps/chrg/board/linker_scripts/link.lds

@@ -7,7 +7,7 @@
 /* Program Entry, set to mark it as "used" and avoid gc */
 MEMORY
 {
-    CODE (rx) : ORIGIN = 0x08010000, LENGTH = 256k /* 256KB flash */
+    CODE (rx) : ORIGIN = 0x08040000, LENGTH = 256k /* 256KB flash */
     RAM1 (rw) : ORIGIN = 0x20000000, LENGTH =  128k /* 128K sram */
     RAM2 (rw) : ORIGIN = 0x10000000, LENGTH =   64k /* 64K sram */
 }

apps/chrg/chrg.uvprojx

@@ -16,7 +16,7 @@
         <TargetCommonOption>
           <Device>STM32F405RG</Device>
           <Vendor>STMicroelectronics</Vendor>
-          <PackID>Keil.STM32F4xx_DFP.3.1.0</PackID>
+          <PackID>Keil.STM32F4xx_DFP.2.17.1</PackID>
           <PackURL>https://www.keil.com/pack/</PackURL>
           <Cpu>IRAM(0x20000000-0x2001FFFF) IRAM2(0x10000000-0x1000FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) CPUTYPE("Cortex-M4") FPU2</Cpu>
           <FlashUtilSpec></FlashUtilSpec>
@@ -53,7 +53,7 @@
           <CreateExecutable>1</CreateExecutable>
           <CreateLib>0</CreateLib>
           <CreateHexFile>1</CreateHexFile>
-          <DebugInformation>1</DebugInformation>
+          <DebugInformation>0</DebugInformation>
           <BrowseInformation>0</BrowseInformation>
           <ListingPath>.\build\keil\List\</ListingPath>
           <HexFormatSelection>1</HexFormatSelection>
@@ -328,8 +328,8 @@
             <uC99>1</uC99>
             <uGnu>0</uGnu>
             <useXO>0</useXO>
-            <v6Lang>1</v6Lang>
+            <v6Lang>3</v6Lang>
-            <v6LangP>1</v6LangP>
+            <v6LangP>3</v6LangP>
             <vShortEn>1</vShortEn>
             <vShortWch>1</vShortWch>
             <v6Lto>0</v6Lto>
@@ -361,11 +361,11 @@
             </VariousControls>
           </Aads>
           <LDads>
-            <umfTarg>1</umfTarg>
+            <umfTarg>0</umfTarg>
             <Ropi>0</Ropi>
             <Rwpi>0</Rwpi>
             <noStLib>0</noStLib>
-            <RepFail>1</RepFail>
+            <RepFail>0</RepFail>
             <useFile>0</useFile>
             <TextAddressRange>0x08000000</TextAddressRange>
             <DataAddressRange>0x20000000</DataAddressRange>

mdks/all_mdks.uvmpw

@@ -8,13 +8,13 @@
   <WorkspaceName>WorkSpace</WorkspaceName>
 
   <project>
-    <PathAndName>.\boot.uvprojx</PathAndName>
+    <PathAndName>..\apps\boot\boot.uvprojx</PathAndName>
-    <NodeIsActive>1</NodeIsActive>
     <NodeIsExpanded>1</NodeIsExpanded>
   </project>
 
   <project>
-    <PathAndName>.\chrg.uvprojx</PathAndName>
+    <PathAndName>..\apps\chrg\chrg.uvprojx</PathAndName>
+    <NodeIsActive>1</NodeIsActive>
     <NodeIsExpanded>1</NodeIsExpanded>
   </project>