first commit for chrg
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/*
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* Copyright (c) 2006-2025 RT-Thread Development Team
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Change Logs:
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* Date Author Notes
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* 2025-01-23 CYFS first version
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*/
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#include <rthw.h>
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#include <rtdevice.h>
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#include <dev_spi_bit_ops.h>
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#ifdef RT_USING_SOFT_SPI
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#if !defined(RT_USING_SOFT_SPI0) &&\
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!defined(RT_USING_SOFT_SPI1) && !defined(RT_USING_SOFT_SPI2) &&\
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!defined(RT_USING_SOFT_SPI3) && !defined(RT_USING_SOFT_SPI4) &&\
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!defined(RT_USING_SOFT_SPI5) && !defined(RT_USING_SOFT_SPI6)
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#error "Please define at least one RT_USING_SOFT_SPIx"
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/*
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This driver can be disabled at:
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menuconfig -> RT-Thread Components -> Device Drivers -> Using I2C device drivers
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*/
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#endif
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#define DBG_ENABLE
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#define DBG_TAG "SPI_S"
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#ifdef RT_SPI_BITOPS_DEBUG
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#define DBG_LEVEL DBG_LOG
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#endif
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#include <rtdbg.h>
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/* spi config class */
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struct rt_soft_spi_config
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{
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rt_base_t sck;
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rt_base_t miso;
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rt_base_t mosi;
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rt_uint32_t timing_delay;
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const char *bus_name;
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};
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/* spi dirver class */
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struct rt_soft_spi
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{
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struct rt_spi_bit_obj spi;
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struct rt_spi_bit_ops ops;
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struct rt_soft_spi_config *cfg;
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};
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static struct rt_soft_spi_config soft_spi_config[] =
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{
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#ifdef RT_USING_SOFT_SPI0
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{
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.sck = RT_SOFT_SPI0_SCK_PIN,
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.miso = RT_SOFT_SPI0_MISO_PIN,
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.mosi = RT_SOFT_SPI0_MOSI_PIN,
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.timing_delay = RT_SOFT_SPI0_TIMING_DELAY,
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.bus_name = RT_SOFT_SPI0_BUS_NAME,
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},
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#endif /*RT_USING_SOFT_SPI0*/
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#ifdef RT_USING_SOFT_SPI1
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{
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.sck = RT_SOFT_SPI1_SCK_PIN,
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.miso = RT_SOFT_SPI1_MISO_PIN,
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.mosi = RT_SOFT_SPI1_MOSI_PIN,
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.timing_delay = RT_SOFT_SPI1_TIMING_DELAY,
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.bus_name = RT_SOFT_SPI1_BUS_NAME,
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},
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#endif /*RT_USING_SOFT_SPI1*/
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#ifdef RT_USING_SOFT_SPI2
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{
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.sck = RT_SOFT_SPI2_SCK_PIN,
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.miso = RT_SOFT_SPI2_MISO_PIN,
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.mosi = RT_SOFT_SPI2_MOSI_PIN,
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.timing_delay = RT_SOFT_SPI2_TIMING_DELAY,
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.bus_name = RT_SOFT_SPI2_BUS_NAME,
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},
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#endif /*RT_USING_SOFT_SPI2*/
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#ifdef RT_USING_SOFT_SPI3
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{
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.sck = RT_SOFT_SPI3_SCK_PIN,
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.miso = RT_SOFT_SPI3_MISO_PIN,
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.mosi = RT_SOFT_SPI3_MOSI_PIN,
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.timing_delay = RT_SOFT_SPI3_TIMING_DELAY,
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.bus_name = RT_SOFT_SPI3_BUS_NAME,
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},
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#endif /*RT_USING_SOFT_SPI3*/
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#ifdef RT_USING_SOFT_SPI4
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{
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.sck = RT_SOFT_SPI4_SCK_PIN,
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.miso = RT_SOFT_SPI4_MISO_PIN,
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.mosi = RT_SOFT_SPI4_MOSI_PIN,
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.timing_delay = RT_SOFT_SPI4_TIMING_DELAY,
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.bus_name = RT_SOFT_SPI4_BUS_NAME,
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},
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#endif /*RT_USING_SOFT_SPI4*/
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#ifdef RT_USING_SOFT_SPI5
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{
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.sck = RT_SOFT_SPI5_SCK_PIN,
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.miso = RT_SOFT_SPI5_MISO_PIN,
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.mosi = RT_SOFT_SPI5_MOSI_PIN,
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.timing_delay = RT_SOFT_SPI5_TIMING_DELAY,
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.bus_name = RT_SOFT_SPI5_BUS_NAME,
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},
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#endif /*RT_USING_SOFT_SPI5*/
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#ifdef RT_USING_SOFT_SPI6
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{
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.sck = RT_SOFT_SPI6_SCK_PIN,
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.miso = RT_SOFT_SPI6_MISO_PIN,
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.mosi = RT_SOFT_SPI6_MOSI_PIN,
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.timing_delay = RT_SOFT_SPI6_TIMING_DELAY,
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.bus_name = RT_SOFT_SPI6_BUS_NAME,
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},
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#endif /*RT_USING_SOFT_SPI6*/
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};
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static struct rt_soft_spi spi_obj[sizeof(soft_spi_config) / sizeof(soft_spi_config[0])];
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static void spi_soft_pin_init(struct rt_soft_spi * soft_spi)
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{
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struct rt_soft_spi_config *cfg = (struct rt_soft_spi_config *)soft_spi->cfg;
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rt_pin_mode(cfg->sck, PIN_MODE_OUTPUT);
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rt_pin_mode(cfg->miso, PIN_MODE_INPUT);
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rt_pin_mode(cfg->mosi, PIN_MODE_OUTPUT);
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rt_pin_write(cfg->miso, PIN_HIGH);
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rt_pin_write(cfg->sck, PIN_HIGH);
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rt_pin_write(cfg->mosi, PIN_HIGH);
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}
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static void spi_soft_tog_sclk(void *data)
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{
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struct rt_soft_spi_config *cfg = (struct rt_soft_spi_config *)data;
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if(rt_pin_read(cfg->sck) == PIN_HIGH)
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{
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rt_pin_write(cfg->sck, PIN_LOW);
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}
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else
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{
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rt_pin_write(cfg->sck, PIN_HIGH);
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}
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}
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static void spi_soft_set_sclk(void *data, rt_int32_t state)
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{
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struct rt_soft_spi_config *cfg = (struct rt_soft_spi_config *)data;
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if (state)
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{
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rt_pin_write(cfg->sck, PIN_HIGH);
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}
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else
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{
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rt_pin_write(cfg->sck, PIN_LOW);
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}
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}
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static void spi_soft_set_mosi(void *data, rt_int32_t state)
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{
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struct rt_soft_spi_config *cfg = (struct rt_soft_spi_config *)data;
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if (state)
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{
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rt_pin_write(cfg->mosi, PIN_HIGH);
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}
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else
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{
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rt_pin_write(cfg->mosi, PIN_LOW);
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}
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}
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static void spi_soft_set_miso(void *data, rt_int32_t state)
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{
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struct rt_soft_spi_config *cfg = (struct rt_soft_spi_config *)data;
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if (state)
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{
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rt_pin_write(cfg->miso, PIN_HIGH);
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}
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else
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{
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rt_pin_write(cfg->miso, PIN_LOW);
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}
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}
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static rt_int32_t spi_soft_get_sclk(void *data)
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{
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struct rt_soft_spi_config *cfg = (struct rt_soft_spi_config *)data;
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return rt_pin_read(cfg->sck);
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}
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static rt_int32_t spi_soft_get_mosi(void *data)
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{
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struct rt_soft_spi_config *cfg = (struct rt_soft_spi_config *)data;
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return rt_pin_read(cfg->mosi);
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}
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static rt_int32_t spi_soft_get_miso(void *data)
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{
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struct rt_soft_spi_config *cfg = (struct rt_soft_spi_config *)data;
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return rt_pin_read(cfg->miso);
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}
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static void spi_soft_dir_mosi(void *data, rt_int32_t state)
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{
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struct rt_soft_spi_config *cfg = (struct rt_soft_spi_config *)data;
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if (state)
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{
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rt_pin_mode(cfg->mosi, PIN_MODE_INPUT);
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}
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else
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{
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rt_pin_mode(cfg->mosi, PIN_MODE_OUTPUT);
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}
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}
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static void spi_soft_dir_miso(void *data, rt_int32_t state)
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{
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struct rt_soft_spi_config *cfg = (struct rt_soft_spi_config *)data;
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if (state)
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{
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rt_pin_mode(cfg->miso, PIN_MODE_INPUT);
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}
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else
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{
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rt_pin_mode(cfg->miso, PIN_MODE_OUTPUT);
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}
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}
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static struct rt_spi_bit_ops soft_spi_ops=
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{
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.data = RT_NULL,
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.pin_init = RT_NULL,
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.tog_sclk = spi_soft_tog_sclk,
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.set_sclk = spi_soft_set_sclk,
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.set_mosi = spi_soft_set_mosi,
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.set_miso = spi_soft_set_miso,
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.get_sclk = spi_soft_get_sclk,
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.get_mosi = spi_soft_get_mosi,
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.get_miso = spi_soft_get_miso,
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.dir_mosi = spi_soft_dir_mosi,
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.dir_miso = spi_soft_dir_miso,
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.udelay = rt_hw_us_delay,
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};
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/* Soft SPI initialization function */
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int rt_soft_spi_init(void)
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{
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rt_size_t obj_num = sizeof(spi_obj) / sizeof(struct rt_soft_spi);
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rt_err_t result;
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for (rt_size_t i = 0; i < obj_num; i++)
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{
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rt_memcpy(&spi_obj[i].ops, &soft_spi_ops, sizeof(struct rt_spi_bit_ops));
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spi_obj[i].ops.data = (void *)&soft_spi_config[i];
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spi_obj[i].spi.ops = &soft_spi_ops;
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spi_obj[i].cfg = (void *)&soft_spi_config[i];
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spi_soft_pin_init(&spi_obj[i]);
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spi_obj[i].spi.ops->delay_us = soft_spi_config[i].timing_delay;
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result = rt_spi_bit_add_bus(&spi_obj[i].spi, soft_spi_config[i].bus_name, &spi_obj[i].ops);
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RT_ASSERT(result == RT_EOK);
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}
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return RT_EOK;
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}
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INIT_PREV_EXPORT(rt_soft_spi_init);
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#endif /* RT_USING_SOFT_SPI */
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