fix sn74lv4052a
This commit is contained in:
@@ -15,7 +15,6 @@
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build
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Debug
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.vs
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rtthread
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settings
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documentation/html
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*~
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@@ -16,7 +16,7 @@
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<TargetCommonOption>
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<Device>STM32F405RGTx</Device>
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<Vendor>STMicroelectronics</Vendor>
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<PackID>Keil.STM32F4xx_DFP.2.17.1</PackID>
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<PackID>Keil.STM32F4xx_DFP.3.1.0</PackID>
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<PackURL>https://www.keil.com/pack/</PackURL>
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<Cpu>IRAM(0x20000000,0x00020000) IRAM2(0x10000000,0x00010000) IROM(0x08000000,0x00100000) CPUTYPE("Cortex-M4") FPU2 CLOCK(12000000) ELITTLE</Cpu>
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<FlashUtilSpec></FlashUtilSpec>
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@@ -10,6 +10,8 @@
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#include <rtdbg.h>
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struct chrg_clk_t chrgclk = {
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.name = TMR_NAME_CLOCK,
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.timer_fd = RT_NULL,
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.cnt = 0,
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};
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@@ -20,26 +22,26 @@ static void chrg_clk_callback (void *args)
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pCLK->cnt++;
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if (pCLK->cnt % 60 == 0) {
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rt_kprintf("R : %d mins\r\n", pCLK->cnt/60);
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//rt_kprintf("R : %d mins\r\n", pCLK->cnt/60);
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}
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//rt_kprintf("\r\n");
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}
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static int chrg_clk_init (void)
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{
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rt_err_t ret = RT_EOK;
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rt_timer_t timer_fd;
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struct chrg_clk_t *pCLK = &chrgclk;
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timer_fd = rt_timer_create("clk", chrg_clk_callback,
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&chrgclk, RT_TICK_PER_SECOND, RT_TIMER_FLAG_PERIODIC);
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if (timer_fd == RT_NULL) {
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//rt_kprintf("create clk.\r\n");
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pCLK->timer_fd = rt_timer_create(pCLK->name, chrg_clk_callback,
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pCLK, RT_TICK_PER_SECOND, RT_TIMER_FLAG_PERIODIC);
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if (pCLK->timer_fd == RT_NULL) {
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LOG_E("create '%s' failed.", pCLK->name);
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return -1;
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} else {
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ret = rt_timer_start(timer_fd);
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ret = rt_timer_start(pCLK->timer_fd);
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if (ret != RT_EOK) {
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rt_kprintf("start clk failed.\r\n");
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LOG_E("start '%s' failed.", pCLK->name);
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return ret;
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}
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}
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@@ -50,3 +52,25 @@ static int chrg_clk_init (void)
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INIT_APP_EXPORT(chrg_clk_init);
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int uptime (void)
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{
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struct chrg_clk_t *pCLK = &chrgclk;
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if (pCLK != RT_NULL) {
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int day = pCLK->cnt/86400;
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int hour = (pCLK->cnt%86400)/3600;
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int minute = ((pCLK->cnt%86400)%3600)/60;
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int second = ((pCLK->cnt%86400)%3600)%60;
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rt_tick_t tick = rt_tick_get();
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rt_kprintf("up %d days, %02d:%02d:%02d.%03d \r\n",
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day, hour, minute, second, tick%1000);
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}
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return 0;
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}
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MSH_CMD_EXPORT(uptime, System running time.);
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@@ -1,8 +1,11 @@
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#ifndef __CHRG_CLK_H__
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#define __CHRG_CLK_H__
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#define TMR_NAME_CLOCK "tmr.clk"
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struct chrg_clk_t {
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const char *name;
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rt_timer_t timer_fd;
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rt_uint32_t cnt;
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};
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@@ -2,6 +2,15 @@
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#include "chrg_switch.h"
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/* sn74lv4052a
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INH B A CHANNELS
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L L L 1Y0, 2Y0
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L L H 1Y1, 2Y1
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L H L 1Y2, 2Y2
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L H H 1Y3, 2Y3
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H X X None
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*/
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int chrg_switch_ch (rt_base_t inA, rt_base_t inB, eIDX_CH ch)
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{
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rt_uint8_t a,b;
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@@ -13,13 +22,13 @@ int chrg_switch_ch (rt_base_t inA, rt_base_t inB, eIDX_CH ch)
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break;
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case IDX_CH_1:
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a = PIN_LOW;
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b = PIN_HIGH;
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a = PIN_HIGH;
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b = PIN_LOW;
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break;
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case IDX_CH_2:
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a = PIN_HIGH;
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b = PIN_LOW;
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a = PIN_LOW;
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b = PIN_HIGH;
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break;
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case IDX_CH_3:
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@@ -124,6 +124,7 @@ static int chrg_north_init (void)
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INIT_APP_EXPORT(chrg_north_init);
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#if 1
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static int north_send(rt_uint8_t argc, char **argv)
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{
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return chrg_north_send("1234567890abcdef", 16);
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@@ -131,6 +132,6 @@ static int north_send(rt_uint8_t argc, char **argv)
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MSH_CMD_EXPORT(north_send, north send test);
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#endif
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@@ -16,7 +16,7 @@
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<TargetCommonOption>
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<Device>STM32F405RG</Device>
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<Vendor>STMicroelectronics</Vendor>
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<PackID>Keil.STM32F4xx_DFP.2.17.1</PackID>
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<PackID>Keil.STM32F4xx_DFP.3.1.0</PackID>
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<PackURL>https://www.keil.com/pack/</PackURL>
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<Cpu>IRAM(0x20000000-0x2001FFFF) IRAM2(0x10000000-0x1000FFFF) IROM(0x8000000-0x80FFFFF) CLOCK(25000000) CPUTYPE("Cortex-M4") FPU2</Cpu>
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<FlashUtilSpec></FlashUtilSpec>
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@@ -9,7 +9,6 @@
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<project>
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<PathAndName>..\apps\boot\boot.uvprojx</PathAndName>
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<NodeIsExpanded>1</NodeIsExpanded>
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</project>
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<project>
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