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fix: 修复南向分包、线程通信和批量下发逻辑

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1.  apps/chrg/debug_hot.ini: 增加调试断点配置
2.  apps/chrg/applications/thread/chrg_north.h: 开启北向调试日志
3.  修正多个头文件函数返回值类型，从void改为int
4.  重构chrg_thread.c: 新增mb消息释放函数，优化邮箱发送逻辑
5.  重写chrg_south.c: 修复分包越界和内存泄漏，增加帧超时处理
6.  重构chrg_sink.c: 统一批量下发接口，修正初始化和运行逻辑
7.  重写chrg_comm.c: 修复系统寄存器写入逻辑，增加通道激活校验
8.  重构chrg_north.c: 修复北向分包越界和内存泄漏，增加超时处理和诊断命令
9.  重构chrg_roll_sou.c: 重构批量下发逻辑，增加重试机制和错误处理
This commit is contained in:
yhf
2026-07-18 18:24:42 +08:00
parent 9904760950
commit dd66c421dd
16 changed files with 1104 additions and 380 deletions
Download Patch File Download Diff File Expand all files Collapse all files
apps/chrg/applications/utils/chrg_sink.c
+86 -71
View File
@@ -444,67 +444,72 @@ int sink_set_pd (rt_uint8_t pd, rt_uint8_t *buf)
//}
//sink开机初始化
void chrg_sink_work_init(eIDX_SOU_CH idx, struct chrg_switch_t *pSW)
{
static int chrg_sink_work_init(eIDX_SOU_CH idx, struct chrg_switch_t *pSW)
{
struct chrg_south_t *pSOU = &chrgsouth;
struct chrg_north_t *pNOR = &chrgnorth;
rt_uint16_t regs[3] = {REG_CURRENT_OUT + 1, REG_MODE, 0};
rt_uint16_t vals[3] = {0, pSW->CV_mode, 0};
rt_uint8_t count = 2;
if (pSW->sink.test.test_mode_old == 1) {
regs[count] = ModbusRTU_ShortTest_CMD_MODE_FLAG;
vals[count++] = ModbusRTU_DYNA_CMD_MODE_STOP;
} else if (pSW->sink.test.test_mode_old == 3) {
regs[count] = ModbusRTU_DYNA_CMD_MODE_FLAG;
vals[count++] = ModbusRTU_DYNA_CMD_MODE_STOP;
}
if (chrg_sou_com_batch_submit(idx, regs, vals, count) != 0) {
return -1;
}
pSW->sink.On_work = 1;
pSOU->enable[idx] = 1;
pSOU->online[idx] = 1;
pNOR->enable[idx] = 1;
chrg_nor_sw_rel((eIDX_NOR_CH)idx, ID_SINK); //打开北向继电器
// 1. 电流输出置0
chrg_sou_com_batch_add_reg(idx, REG_CURRENT_OUT+1, 0);
// 2. 设置硬件恒压/恒流模式
chrg_sou_com_batch_add_reg(idx,REG_MODE,pSW->CV_mode);
switch(pSW->sink.test.test_mode_old){
case 0:
break;
case 1://短路测试退出
chrg_sou_com_batch_add_reg((eIDX_SOU_CH)idx, ModbusRTU_ShortTest_CMD_MODE_FLAG , ModbusRTU_DYNA_CMD_MODE_STOP);
break;
case 2:
break;
case 3:
chrg_sou_com_batch_add_reg((eIDX_SOU_CH)idx, ModbusRTU_DYNA_CMD_MODE_FLAG , ModbusRTU_DYNA_CMD_MODE_STOP);
break;
}
pSW->sink.test.test_mode_old = 0;
pSW->sink.work_mode = SINK_WORK_WAIT;
return 0;
}
//sink进入运行状态
void chrg_sink_work_volt_runing(eIDX_SOU_CH idx, struct chrg_switch_t *pSW){
chrg_sou_com_batch_add_reg(idx, 0x01, 0x02);
//打开主继电器
chrg_sou_com_batch_add_reg(idx, 0x01, 0x03);
if(pSW->CV_mode == MODE_CONSTANT_VOLTAGE)
{
chrg_sou_com_batch_add_reg(idx, REG_VOLTAGE_OUT+1, pSW->sink.loadv);
}
else
{
chrg_sou_com_batch_add_reg(idx, REG_CURRENT_OUT+1, pSW->sink.loadc);
}
chrg_sou_com_batch_add_reg(idx, REG_WORK, WORK_START);
static int chrg_sink_work_volt_runing(eIDX_SOU_CH idx, struct chrg_switch_t *pSW)
{
rt_uint16_t regs[4] = {0x01, 0x01, 0, REG_WORK};
rt_uint16_t vals[4] = {0x02, 0x03, 0, WORK_START};
if (pSW->CV_mode == MODE_CONSTANT_VOLTAGE) {
regs[2] = REG_VOLTAGE_OUT + 1;
vals[2] = pSW->sink.loadv;
} else {
regs[2] = REG_CURRENT_OUT + 1;
vals[2] = pSW->sink.loadc;
}
return chrg_sou_com_batch_submit(idx, regs, vals, 4);
}
//sink进入低电压状态
void chrg_sink_nor_work_low(eIDX_SOU_CH idx, struct chrg_switch_t *pSW)
static int chrg_sink_nor_work_low(eIDX_SOU_CH idx, struct chrg_switch_t *pSW)
{
chrg_sou_com_batch_add_reg(idx, 0x01, 0x00);
chrg_sou_com_batch_add_reg(idx, REG_WORK, WORK_STOP);
rt_uint16_t regs[2] = {0x01, REG_WORK};
rt_uint16_t vals[2] = {0x00, WORK_STOP};
return chrg_sou_com_batch_submit(idx, regs, vals, 2);
}
//com端关机流程
void chrg_sink_nor_work_off(eIDX_SOU_CH idx, struct chrg_switch_t *pSW)
static int chrg_sink_nor_work_off(eIDX_SOU_CH idx, struct chrg_switch_t *pSW)
{
struct chrg_south_t *pSOU = &chrgsouth;
struct chrg_north_t *pNOR = &chrgnorth;
rt_uint16_t regs[2] = {0x01, REG_WORK};
rt_uint16_t vals[2] = {0x00, WORK_STOP};
if (chrg_sou_com_batch_submit(idx, regs, vals, 2) != 0) {
return -1;
}
pSW->sink.On_work = 0;
pSOU->enable[idx] = 0;
@@ -512,70 +517,80 @@ void chrg_sink_nor_work_off(eIDX_SOU_CH idx, struct chrg_switch_t *pSW)
pNOR->enable[idx] = 0;
chrg_nor_sw_rel((eIDX_NOR_CH)idx, 0); //关闭北向继电器
chrg_sou_com_batch_add_reg(idx, 0x01, 0x00);
chrg_sou_com_batch_add_reg(idx, REG_WORK, WORK_STOP);
return 0;
}
//动态测试启动
void chrg_sink_change_ON(rt_uint8_t ch, struct chrg_switch_t *pSW)
static int chrg_sink_change_ON(rt_uint8_t ch, struct chrg_switch_t *pSW)
{
struct test *pTest = &pSW->sink.test;
chrg_sou_com_batch_add_reg((eIDX_SOU_CH)ch, ModbusRTU_DYNA_L1, pTest->change_test.curr1_set);
chrg_sou_com_batch_add_reg((eIDX_SOU_CH)ch, ModbusRTU_DYNA_T1 , pTest->change_test.time1_set);
chrg_sou_com_batch_add_reg((eIDX_SOU_CH)ch, ModbusRTU_DYNA_L2 , pTest->change_test.curr2_set);
chrg_sou_com_batch_add_reg((eIDX_SOU_CH)ch, ModbusRTU_DYNA_T2 , pTest->change_test.time2_set);
chrg_sou_com_batch_add_reg((eIDX_SOU_CH)ch, ModbusRTU_DYNA_CMD_MODE_FLAG , ModbusRTU_DYNA_CMD_MODE_RUN);
chrg_sou_com_batch_add_reg((eIDX_SOU_CH)ch, REG_WORK, WORK_START);
rt_uint16_t regs[6] = {ModbusRTU_DYNA_L1, ModbusRTU_DYNA_T1,
ModbusRTU_DYNA_L2, ModbusRTU_DYNA_T2, ModbusRTU_DYNA_CMD_MODE_FLAG, REG_WORK};
rt_uint16_t vals[6] = {pTest->change_test.curr1_set, pTest->change_test.time1_set,
pTest->change_test.curr2_set, pTest->change_test.time2_set,
ModbusRTU_DYNA_CMD_MODE_RUN, WORK_START};
return chrg_sou_com_batch_submit((eIDX_SOU_CH)ch, regs, vals, 6);
}
//短路测试启动
void chrg_sink_SHOUT_ON(rt_uint8_t ch, struct chrg_switch_t *pSW)
static int chrg_sink_SHOUT_ON(rt_uint8_t ch, struct chrg_switch_t *pSW)
{
struct test *pTest = &pSW->sink.test;
chrg_sou_com_batch_add_reg((eIDX_SOU_CH)ch, ModbusRTU_ShortTest_CMD_MODE_FLAG , ModbusRTU_DYNA_CMD_MODE_RUN_ALWAYS_KEPP); //保持
chrg_sou_com_batch_add_reg((eIDX_SOU_CH)ch, REG_WORK, WORK_START);
rt_uint16_t regs[2] = {ModbusRTU_ShortTest_CMD_MODE_FLAG, REG_WORK};
rt_uint16_t vals[2] = {ModbusRTU_DYNA_CMD_MODE_RUN_ALWAYS_KEPP, WORK_START};
return chrg_sou_com_batch_submit((eIDX_SOU_CH)ch, regs, vals, 2);
}
//负载工作
void chrg_sink_work(eIDX_SOU_CH idx, struct chrg_switch_t *pSW){
int chrg_sink_work(eIDX_SOU_CH idx, struct chrg_switch_t *pSW)
{
static uint8_t last_state[TOTAL_SOU_CHS] ={100,100,100,100};
rt_uint8_t work_mode = pSW->sink.work_mode;
rt_uint8_t work_mode;
int ret = -1;
// 本次状态和上次一致，直接跳过，不重复下发寄存器
if (work_mode == last_state[idx])
{
return;
}
chrg_sou_com_sou_set();
if ((idx >= TOTAL_SOU_CHS) || (pSW == RT_NULL)) {
return -1;
}
work_mode = pSW->sink.work_mode;
// 本次状态和上次一致，直接跳过，不重复下发寄存器
if (work_mode == last_state[idx]) {
return 0;
}
switch(work_mode){
case SINK_WORK_INIT:
chrg_sink_work_init(idx,pSW);
ret = chrg_sink_work_init(idx,pSW);
break;
case SINK_WORK_WAIT:
ret = 0;
break;
case SINK_WORK_RUNING:
chrg_sink_work_volt_runing(idx,pSW);
ret = chrg_sink_work_volt_runing(idx,pSW);
break;
case SINK_WORK_RUNING_2:
chrg_sink_work_volt_runing(idx,pSW);
ret = chrg_sink_work_volt_runing(idx,pSW);
break;
case SINK_WORK_ON_TEST_CHANGE:
chrg_sink_change_ON(idx,pSW);
ret = chrg_sink_change_ON(idx,pSW);
break;
case SINK_WORK_ON_TEST_SHOUT:
chrg_sink_SHOUT_ON(idx,pSW);
ret = chrg_sink_SHOUT_ON(idx,pSW);
break;
case SINK_WORK_LOW:
chrg_sink_nor_work_low(idx,pSW);
ret = chrg_sink_nor_work_low(idx,pSW);
break;
case SINK_WORK_STOP:
chrg_sink_nor_work_off(idx,pSW);
break;
ret = chrg_sink_nor_work_off(idx,pSW);
break;
default:
break;
}
// 更新缓存，保存本次最新状态
last_state[idx] = work_mode;
if (ret == 0) {
last_state[idx] = work_mode;
}
return ret;
}