debug uart

This commit is contained in:
wmano
2025-09-02 22:09:40 +08:00
parent d633c6b55f
commit f6985d97c5
9 changed files with 105 additions and 45 deletions
+1 -1
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@@ -4,7 +4,7 @@
#include "app_config.h" #include "app_config.h"
#define BSP_PRINTF_BUFF_SIZE 256 #define BSP_PRINTF_BUFF_SIZE 256
#define BSP_PRINTF_HANDLE UART(1) #define BSP_PRINTF_HANDLE UART(2)
#define BSP_UART_BUFF_SIZE 64 #define BSP_UART_BUFF_SIZE 64
+1 -1
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@@ -681,7 +681,7 @@ void APP_Init (void)
TIMER_RUN_FOREVER); TIMER_RUN_FOREVER);
drv_timer_start(&timerWait); drv_timer_start(&timerWait);
DT_Init(&fdUart, BSP_UART2, gRecv.bufRx, &gRecv.lenRx, YM_MSG_SIZE_MAX + 16); DT_Init(&fdUart, BSP_UART1, gRecv.bufRx, &gRecv.lenRx, YM_MSG_SIZE_MAX + 16);
ymodem_init(sendDataHandler, boot_ProtocolDataHandle, boot_SetReplyInfo); ymodem_init(sendDataHandler, boot_ProtocolDataHandle, boot_SetReplyInfo);
+2 -2
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@@ -13,8 +13,8 @@ extern "C" {
#define KEY0_Pin GPIO_PIN_8 #define KEY0_Pin GPIO_PIN_8
#define KEY0_GPIO_Port GPIOC #define KEY0_GPIO_Port GPIOC
#define LED0_Pin GPIO_PIN_8 #define LED0_Pin GPIO_PIN_13
#define LED0_GPIO_Port GPIOA #define LED0_GPIO_Port GPIOC
#elif defined(STM32F411xE)||defined(STM32F401xC) #elif defined(STM32F411xE)||defined(STM32F401xC)
#define KEY0_Pin GPIO_PIN_0 #define KEY0_Pin GPIO_PIN_0
#define KEY0_GPIO_Port GPIOA #define KEY0_GPIO_Port GPIOA
+2 -2
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@@ -188,14 +188,14 @@ int main (void)
int fputc(int ch, FILE *f) int fputc(int ch, FILE *f)
{ {
HAL_UART_Transmit(&huart1, (uint8_t *)&ch, 1, 0xffff); HAL_UART_Transmit(&huart2, (uint8_t *)&ch, 1, 0xffff);
return ch; return ch;
} }
int fgetc(FILE * f) int fgetc(FILE * f)
{ {
uint8_t ch = 0; uint8_t ch = 0;
HAL_UART_Receive(&huart1,&ch, 1, 0xffff); HAL_UART_Receive(&huart2,&ch, 1, 0xffff);
return ch; return ch;
} }
+2 -2
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@@ -180,7 +180,7 @@ CONFIG_RT_USING_DEVICE=y
# CONFIG_RT_USING_THREADSAFE_PRINTF is not set # CONFIG_RT_USING_THREADSAFE_PRINTF is not set
CONFIG_RT_USING_CONSOLE=y CONFIG_RT_USING_CONSOLE=y
CONFIG_RT_CONSOLEBUF_SIZE=128 CONFIG_RT_CONSOLEBUF_SIZE=128
CONFIG_RT_CONSOLE_DEVICE_NAME="uart1" CONFIG_RT_CONSOLE_DEVICE_NAME="uart2"
CONFIG_RT_VER_NUM=0x50201 CONFIG_RT_VER_NUM=0x50201
# CONFIG_RT_USING_STDC_ATOMIC is not set # CONFIG_RT_USING_STDC_ATOMIC is not set
CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32 CONFIG_RT_BACKTRACE_LEVEL_MAX_NR=32
@@ -419,7 +419,7 @@ CONFIG_PKG_MODBUS_MASTER_SAMPLE=y
CONFIG_MB_SAMPLE_TEST_SLAVE_ADDR=1 CONFIG_MB_SAMPLE_TEST_SLAVE_ADDR=1
CONFIG_MB_MASTER_USING_PORT_NUM=1 CONFIG_MB_MASTER_USING_PORT_NUM=1
CONFIG_MB_MASTER_USING_PORT_BAUDRATE=115200 CONFIG_MB_MASTER_USING_PORT_BAUDRATE=115200
CONFIG_PKG_MODBUS_SLAVE=y # CONFIG_PKG_MODBUS_SLAVE is not set
# #
# advanced configuration # advanced configuration
+1 -1
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@@ -14,7 +14,7 @@
#define TMR_NAME_LED2 "tmr_led2" #define TMR_NAME_LED2 "tmr_led2"
#define TMR_NAME_LED3 "tmr_led3" #define TMR_NAME_LED3 "tmr_led3"
#define PIN_LED1 GET_PIN(A, 8) //GET_PIN(C, 13) #define PIN_LED1 GET_PIN(C, 13)
#define PIN_LED2 GET_PIN(C, 14) #define PIN_LED2 GET_PIN(C, 14)
#define PIN_LED3 GET_PIN(C, 15) #define PIN_LED3 GET_PIN(C, 15)
@@ -28,5 +28,65 @@ void source_get_vc (rt_uint16_t vol, rt_uint16_t cur)
chrg_north_send(data, len); chrg_north_send(data, len);
} }
void source_get_pd (void)
{
rt_size_t len = 0;
rt_uint8_t data[8] = {0};
data[0] = 0x05;
data[1] = 0x00;
data[2] = ID_SOURCE;
data[3] = SRC_CMD_GET_PROTOCOL;
data[4] = calc_crc8(data, 4);
len = 0x05;
chrg_north_send(data, len);
}
void source_set_cc_lvl (rt_uint8_t lvl)
{
rt_size_t len = 0;
rt_uint8_t data[8] = {0};
data[0] = 0x06;
data[1] = 0x00;
data[2] = ID_SOURCE;
data[3] = SRC_CMD_SET_CC_LEVEL;
data[4] = lvl;
data[5] = calc_crc8(data, 5);
len = 0x06;
chrg_north_send(data, len);
}
void source_set_pd (rt_uint8_t pro, rt_uint8_t src, rt_uint8_t pps,
rt_uint16_t vmax, rt_uint16_t vmin, rt_int16_t max_cur)
{
rt_size_t len = 0;
rt_uint8_t data[12] = {0};
data[0] = 0x0B;
data[1] = 0x00;
data[2] = ID_SOURCE;
data[3] = SRC_CMD_SET_PROTOCOL;
data[4] = pro;
data[5] = src;
data[6] = pps;
u16_to_u8v(vmax, &data[7]);
u16_to_u8v(vmin, &data[9]);
u16_to_u8v(max_cur, &data[11]);
data[13] = calc_crc8(data, 13);
len = 0x0E;
chrg_north_send(data, len);
}
+1
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@@ -10,6 +10,7 @@
<TargetName>chrg</TargetName> <TargetName>chrg</TargetName>
<ToolsetNumber>0x4</ToolsetNumber> <ToolsetNumber>0x4</ToolsetNumber>
<ToolsetName>ARM-ADS</ToolsetName> <ToolsetName>ARM-ADS</ToolsetName>
<pCCUsed>5060960::V5.06 update 7 (build 960)::.\ARMCC</pCCUsed>
<uAC6>0</uAC6> <uAC6>0</uAC6>
<TargetOption> <TargetOption>
<TargetCommonOption> <TargetCommonOption>
+1 -2
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@@ -103,7 +103,7 @@
#define RT_USING_DEVICE #define RT_USING_DEVICE
#define RT_USING_CONSOLE #define RT_USING_CONSOLE
#define RT_CONSOLEBUF_SIZE 128 #define RT_CONSOLEBUF_SIZE 128
#define RT_CONSOLE_DEVICE_NAME "uart1" #define RT_CONSOLE_DEVICE_NAME "uart2"
#define RT_VER_NUM 0x50201 #define RT_VER_NUM 0x50201
#define RT_BACKTRACE_LEVEL_MAX_NR 32 #define RT_BACKTRACE_LEVEL_MAX_NR 32
/* end of RT-Thread Kernel */ /* end of RT-Thread Kernel */
@@ -232,7 +232,6 @@
#define MB_SAMPLE_TEST_SLAVE_ADDR 1 #define MB_SAMPLE_TEST_SLAVE_ADDR 1
#define MB_MASTER_USING_PORT_NUM 1 #define MB_MASTER_USING_PORT_NUM 1
#define MB_MASTER_USING_PORT_BAUDRATE 115200 #define MB_MASTER_USING_PORT_BAUDRATE 115200
#define PKG_MODBUS_SLAVE
/* advanced configuration */ /* advanced configuration */