diff --git a/apps/boot/application/main.c b/apps/boot/application/main.c
index 7c48401..314d8be 100644
--- a/apps/boot/application/main.c
+++ b/apps/boot/application/main.c
@@ -240,10 +240,10 @@ int main (void)
 		VERSION_MAIN, VERSION_SUB, VERSION_FIX, BUILD_TIMESTAMP);
 #endif
 	APP_Init();
-	boot_JumpToAPP();
+	//boot_JumpToAPP();
 	while (1) {
 		
-		//APP_Running();
+		APP_Running();
 	}
 
 	return -1;
diff --git a/apps/chrg/applications/thread/chrg_comm.c b/apps/chrg/applications/thread/chrg_comm.c
index b7bd820..9d08969 100644
--- a/apps/chrg/applications/thread/chrg_comm.c
+++ b/apps/chrg/applications/thread/chrg_comm.c
@@ -1,7 +1,7 @@
 /****************************************************************************
 文件名称   : chrg_comm.c
 完成日期   : 
-当前版本号 : V1.1.9
+当前版本号 : V1.1.10
 主要功能   : 实现对外通讯协议 MODBUS 服务端，以独立线程等待处理响应请求数据。
 版本历史   : 创建原始版本
 说明      : 
@@ -27,7 +27,7 @@
 #include "stm32f4xx_hal.h"
 
 #define HOLD_REG_FIRMWARE_VERSION 0x0300U /* 协议板固件版本，只读 */
-#define CHRG_FIRMWARE_VERSION     0x0119U /* 当前协议板版本：V1.1.9 */
+#define CHRG_FIRMWARE_VERSION     0x011AU /* 当前协议板版本：V1.1.10 */
 
 rt_uint8_t ucDiscInBuf[(TOTAL_DISC_REGS+BITS_UCHAR-1)/BITS_UCHAR];
 rt_uint8_t ucCoilBuf[(TOTAL_COIL_REGS+BITS_UCHAR-1)/BITS_UCHAR];
@@ -43,6 +43,7 @@ rt_uint8_t  mobude_ymodem_buf_2[MB_YMODEM_DATA_SIZE] = {0};//南向功率板升
 #define YMODEM_C_PERIOD_MS           1000
 #define YMODEM_META_ACK_TIMEOUT_MS   3000
 #define YMODEM_DATA_ACK_TIMEOUT_MS   1000
+#define YMODEM_RX_FRAME_TIMEOUT_MS   300
 #define YMODEM_MAX_RETRIES           3
 
 /* COM侧升级会话状态：接收缓存负责拼帧，备份缓存负责超时/NAK重发。 */
@@ -54,6 +55,16 @@ static rt_uint8_t g_ymodem_retry_count = 0;
 static rt_uint8_t g_ymodem_eot_done = 0;
 static rt_tick_t g_ymodem_send_tick = 0;
 static rt_tick_t g_ymodem_c_tick = 0;
+static rt_tick_t g_ymodem_rx_tick = 0;
+static rt_uint8_t g_ymodem_deferred_resp = 0;
+static rt_uint32_t g_ymodem_frame_count = 0;
+static rt_uint32_t g_ymodem_send_count = 0;
+
+static const rt_uint8_t g_ymodem_update_frame[8] =
+    {ID_ELOAD, 0x06, 0x00, 0x0F, 0x00, 0xFF, 0xF8, 0x6B};
+static const rt_uint8_t g_ymodem_jump_frame[8] =
+    {ID_ELOAD, 0x06, 0x00, 0x0F, 0x00, 0x0F, 0xF8, 0x2F};
+static void chrg_ymodem_session_stop(void);
 /* Modbus 影子寄存器: 0x06/0x10 写操作暂存到此, PARAM_EFFECT 生效后复制到实际 pNOR->sw */
 static struct chrg_switch_t g_shadow_sw[TOTAL_NOR_CHS];
 static rt_uint8_t g_shadow_dirty[TOTAL_NOR_CHS] = {0}; /* 0=已生效 1=待生效，防止重复覆盖 */
@@ -607,7 +618,7 @@ eMBException funcReadHoldingRegister (rt_uint8_t *reqFrame, rt_uint16_t reqLen,
 
 	/*
 	 * 协议板版本号使用独立的只读地址0x0300，不占用现有通道保持寄存器空间。
-	 * 当前版本V1.1.9编码为0x0119，Modbus响应按高字节在前返回01 19。
+	 * 当前版本V1.1.10编码为0x011A，Modbus响应按高字节在前返回01 1A。
 	 * 该特殊地址只支持一次读取一个寄存器，避免与普通连续寄存器混用。
 	 */
 	if (regAddress == HOLD_REG_FIRMWARE_VERSION) {
@@ -1399,9 +1410,112 @@ static void chrg_ymodem_protocol_reset(void)
 	g_ymodem_eot_done = 0;
 	g_ymodem_send_tick = 0;
 	g_ymodem_c_tick = rt_tick_get();
+	g_ymodem_rx_tick = 0;
+	g_ymodem_deferred_resp = 0;
+	g_ymodem_frame_count = 0;
+	g_ymodem_send_count = 0;
 	s_first_soh_rcvd = 0;
 }
 
+static const char *chrg_ymodem_state_name(Ymodem_state state)
+{
+	switch (state) {
+	case Ymodem_Wait:
+		return "WAIT";
+	case Ymodem_Rec_Start:
+		return "START";
+	case Ymodem_Rec_1024:
+		return "DATA";
+	case Ymodem_Rec_End:
+		return "EOT";
+	case Ymodem_Rec_Finish:
+		return "FINISH";
+	default:
+		return "IDLE";
+	}
+}
+
+static const char *chrg_ymodem_resp_name(rt_uint8_t response)
+{
+	switch (response) {
+	case ACK:
+		return "ACK";
+	case NAK:
+		return "NAK";
+	case ACK_C:
+		return "C";
+	case YM_CAN:
+		return "CAN";
+	default:
+		return "NONE";
+	}
+}
+
+static rt_uint8_t chrg_ymodem_take_south_resp(void)
+{
+	rt_uint8_t resp;
+
+	if (g_ymodem_deferred_resp != 0) {
+		resp = g_ymodem_deferred_resp;
+		g_ymodem_deferred_resp = 0;
+		return resp;
+	}
+	return chrg_eload_get_ymodem_resp();
+}
+
+static int chrg_ymodem_wait_south_ack(rt_uint32_t timeout_ms)
+{
+	rt_tick_t start = rt_tick_get();
+	rt_uint8_t resp;
+
+	while ((rt_tick_t)(rt_tick_get() - start) <
+		rt_tick_from_millisecond(timeout_ms)) {
+		resp = chrg_eload_get_ymodem_resp();
+		if (resp == ACK) {
+			rt_kprintf("[UPG] south=%s state=%s\r\n",
+				chrg_ymodem_resp_name(resp), chrg_ymodem_state_name(ystate));
+			return 0;
+		}
+		if (resp == NAK || resp == YM_CAN) {
+			rt_kprintf("[UPG] south=%s state=%s\r\n",
+				chrg_ymodem_resp_name(resp), chrg_ymodem_state_name(ystate));
+			return -2;
+		}
+		if (resp != 0 && g_ymodem_deferred_resp == 0) {
+			g_ymodem_deferred_resp = resp;
+		}
+		rt_thread_mdelay(1);
+	}
+	return -1;
+}
+
+static int chrg_ymodem_send_control_frame(const rt_uint8_t *frame)
+{
+	rt_uint8_t retry;
+	int wait_result;
+	const char *control_name = (frame[5] == 0xFF) ? "ENTER" : "JUMP";
+
+	rt_kprintf("[UPG] CTRL %s begin\r\n", control_name);
+
+	for (retry = 0; retry < YMODEM_MAX_RETRIES; retry++) {
+		int send_result = chrg_send_sou_upadata_data(frame, 8);
+		rt_kprintf("[UPG] CTRL %s try=%u tx=%d\r\n",
+			control_name, (unsigned int)(retry + 1), send_result);
+		if (send_result == 0) {
+			wait_result = chrg_ymodem_wait_south_ack(YMODEM_META_ACK_TIMEOUT_MS);
+			if (wait_result == 0) {
+				rt_kprintf("[UPG] CTRL %s done\r\n", control_name);
+				return 0;
+			}
+			rt_kprintf("[UPG] CTRL %s wait=%d\r\n", control_name, wait_result);
+		}
+	}
+	rt_kprintf("[UPG] CTRL %s failed\r\n", control_name);
+	return -1;
+}
+
+static void chrg_ymodem_session_stop(void);
+
 /*****************************************************************
 函数名称： chrg_ymodem_session_start
 函数描述： 停止普通南向请求并进入指定通道的升级透传模式
@@ -1443,6 +1557,15 @@ static int chrg_ymodem_session_start(eIDX_SOU_CH ch)
 	pROLL->ch = (rt_uint8_t)ch;
 	rt_mutex_release(pTHR->mutex);
 	ystate = Ymodem_Wait;
+	rt_kprintf("[UPG] START ch=%u mode=%u run=%u state=%s\r\n",
+		(unsigned int)ch, (unsigned int)pROLL->mode,
+		(unsigned int)pROLL->run, chrg_ymodem_state_name(ystate));
+
+	/* 功率板完成擦除后才返回ACK，并立即开始发送C。 */
+	if (chrg_ymodem_send_control_frame(g_ymodem_update_frame) != 0) {
+		chrg_ymodem_session_stop();
+		return -3;
+	}
 	return 0;
 }
 
@@ -1460,6 +1583,13 @@ static void chrg_ymodem_session_stop(void)
 	struct chrg_rollsou_t *pROLL = &chrgrollsou;
 	struct chrg_south_t *pSOU = &chrgsouth;
 
+	rt_kprintf("[UPG] STOP state=%s rx_frames=%lu tx_frames=%lu retries=%u eot=%u\r\n",
+		chrg_ymodem_state_name(ystate),
+		(unsigned long)g_ymodem_frame_count,
+		(unsigned long)g_ymodem_send_count,
+		(unsigned int)g_ymodem_retry_count,
+		(unsigned int)g_ymodem_eot_done);
+
 	if (pTHR->mutex != RT_NULL) {
 		rt_mutex_take(pTHR->mutex, RT_WAITING_FOREVER);
 		pROLL->mode = 0;
@@ -1498,14 +1628,20 @@ eMBException funYmodemUpadata (rt_uint8_t *reqFrame, rt_uint16_t reqLen,
 			return MB_EX_SLAVE_BUSY;
 		}
 	} else if (reqFrame[5] == 0x00) {
+		chrg_eload_clear_ymodem_resp();
+		if (chrg_ymodem_send_control_frame(g_ymodem_jump_frame) != 0) {
+			chrg_ymodem_session_stop();
+			return MB_EX_SLAVE_DEVICE_FAILURE;
+		}
 		chrg_ymodem_session_stop();
 	} else {
 		return MB_EX_ILLEGAL_DATA_VALUE;
 	}
 
 	/* 保留原0x20响应内容，外层统一补设备地址和Modbus CRC。 */
-	(void)mb_ymodem_updata_cb(&ystate, resFrame);
-	*resLen = 1;
+	resFrame[0] = reqFrame[0];
+	resFrame[1] = ACK;
+	*resLen = 2;
 	return MB_EX_NONE;
 }
 
@@ -1689,9 +1825,16 @@ static int chrg_ymodem_resend_last(void)
 	}
 	ret = chrg_send_sou_upadata_data(mobude_ymodem_buf_2, g_ymodem_last_len);
 	if (ret == 0) {
+		g_ymodem_send_count++;
 		g_ymodem_retry_count++;
 		g_ymodem_send_tick = rt_tick_get();
 		g_ymodem_waiting_ack = 1;
+		rt_kprintf("[UPG] RETX south frame=%02X pkt=%u len=%u count=%lu retry=%u state=%s\r\n",
+			mobude_ymodem_buf_2[0], (unsigned int)mobude_ymodem_buf_2[1],
+			(unsigned int)g_ymodem_last_len,
+			(unsigned long)g_ymodem_send_count,
+			(unsigned int)g_ymodem_retry_count,
+			chrg_ymodem_state_name(ystate));
 	}
 	return ret;
 }
@@ -1724,6 +1867,7 @@ static int chrg_ymodem_process(const rt_uint8_t *data, rt_uint16_t length)
 				continue;
 			}
 			g_ymodem_rx_len = 0;
+			g_ymodem_rx_tick = rt_tick_get();
 		}
 
 		copy_len = g_ymodem_expected_len - g_ymodem_rx_len;
@@ -1738,8 +1882,13 @@ static int chrg_ymodem_process(const rt_uint8_t *data, rt_uint16_t length)
 		}
 
 		if (!chrg_ymodem_frame_valid(mobude_ymodem_buf, g_ymodem_rx_len)) {
+			rt_kprintf("[UPG] RX invalid header=0x%02X pkt=%u len=%u state=%s\r\n",
+				mobude_ymodem_buf[0], (unsigned int)mobude_ymodem_buf[1],
+				(unsigned int)g_ymodem_rx_len,
+				chrg_ymodem_state_name(ystate));
 			g_ymodem_rx_len = 0;
 			g_ymodem_expected_len = 0;
+			g_ymodem_rx_tick = 0;
 			return -3;
 		}
 
@@ -1764,13 +1913,28 @@ static int chrg_ymodem_process(const rt_uint8_t *data, rt_uint16_t length)
 		} else {
 			ystate = Ymodem_Rec_Finish;
 		}
+		g_ymodem_frame_count++;
+		rt_kprintf("[UPG] RX frame=%02X pkt=%u len=%u total=%lu state=%s\r\n",
+			mobude_ymodem_buf[0], (unsigned int)mobude_ymodem_buf[1],
+			(unsigned int)g_ymodem_last_len,
+			(unsigned long)g_ymodem_frame_count,
+			chrg_ymodem_state_name(ystate));
 
 		ret = chrg_send_sou_upadata_data(mobude_ymodem_buf_2, g_ymodem_last_len);
 		g_ymodem_rx_len = 0;
 		g_ymodem_expected_len = 0;
+		g_ymodem_rx_tick = 0;
 		if (ret != 0) {
+			rt_kprintf("[UPG] TX south failed frame=%02X pkt=%u ret=%d\r\n",
+				mobude_ymodem_buf_2[0], (unsigned int)mobude_ymodem_buf_2[1], ret);
 			return -4;
 		}
+		g_ymodem_send_count++;
+		rt_kprintf("[UPG] TX south frame=%02X pkt=%u len=%u count=%lu state=%s\r\n",
+			mobude_ymodem_buf_2[0], (unsigned int)mobude_ymodem_buf_2[1],
+			(unsigned int)g_ymodem_last_len,
+			(unsigned long)g_ymodem_send_count,
+			chrg_ymodem_state_name(ystate));
 		g_ymodem_retry_count = 0;
 		g_ymodem_waiting_ack = 1;
 		g_ymodem_send_tick = rt_tick_get();
@@ -1794,35 +1958,42 @@ static rt_uint8_t ymodem_send(struct chrg_comm_t *pCOMM)
 
 	pCOMM->tx_len = 0;
 	now = rt_tick_get();
-	if ((s_first_soh_rcvd == 0) && (g_ymodem_waiting_ack == 0) &&
-		((now - g_ymodem_c_tick) >= rt_tick_from_millisecond(YMODEM_C_PERIOD_MS))) {
-		pCOMM->tx_buf[0] = ACK_C;
+	if ((g_ymodem_expected_len != 0) && (g_ymodem_rx_tick != 0) &&
+		((now - g_ymodem_rx_tick) >=
+		 rt_tick_from_millisecond(YMODEM_RX_FRAME_TIMEOUT_MS))) {
+		g_ymodem_rx_len = 0;
+		g_ymodem_expected_len = 0;
+		g_ymodem_rx_tick = 0;
+		pCOMM->tx_buf[0] = NAK;
 		pCOMM->tx_len = 1;
-		g_ymodem_c_tick = now;
+		rt_kprintf("[UPG] RX timeout -> NAK state=%s\r\n",
+			chrg_ymodem_state_name(ystate));
 		return 1;
 	}
 
-	south_resp = chrg_eload_get_ymodem_resp();
+	south_resp = chrg_ymodem_take_south_resp();
 	if (south_resp == ACK) {
 		g_ymodem_waiting_ack = 0;
 		g_ymodem_retry_count = 0;
 		if (ystate == Ymodem_Rec_Start) {
 			pCOMM->tx_buf[0] = ACK;
-			pCOMM->tx_buf[1] = ACK_C;
-			pCOMM->tx_len = 2;
+			pCOMM->tx_len = 1;
 		} else if (ystate == Ymodem_Rec_End) {
 			pCOMM->tx_buf[0] = ACK;
-			pCOMM->tx_buf[1] = ACK_C;
-			pCOMM->tx_len = 2;
+			pCOMM->tx_len = 1;
 			g_ymodem_eot_done = 1;
 			ystate = Ymodem_Rec_Finish;
 		} else {
 			pCOMM->tx_buf[0] = ACK;
 			pCOMM->tx_len = 1;
 		}
+		rt_kprintf("[UPG] SOUTH ACK state=%s retries=%u\r\n",
+			chrg_ymodem_state_name(ystate), (unsigned int)g_ymodem_retry_count);
 		return 1;
 	}
 	if (south_resp == NAK) {
+		rt_kprintf("[UPG] SOUTH NAK state=%s retry=%u\r\n",
+			chrg_ymodem_state_name(ystate), (unsigned int)g_ymodem_retry_count);
 		if (g_ymodem_retry_count >= YMODEM_MAX_RETRIES) {
 			pCOMM->tx_buf[0] = YM_CAN;
 			pCOMM->tx_buf[1] = YM_CAN;
@@ -1834,6 +2005,8 @@ static rt_uint8_t ymodem_send(struct chrg_comm_t *pCOMM)
 		return 0;
 	}
 	if (south_resp == ACK_C) {
+		rt_kprintf("[UPG] SOUTH C state=%s waiting=%u\r\n",
+			chrg_ymodem_state_name(ystate), (unsigned int)g_ymodem_waiting_ack);
 		/* 等待当前帧ACK时忽略功率板周期C，避免打乱上位机停止等待握手。 */
 		if (g_ymodem_waiting_ack != 0) {
 			return 0;
@@ -1843,6 +2016,8 @@ static rt_uint8_t ymodem_send(struct chrg_comm_t *pCOMM)
 		return 1;
 	}
 	if (south_resp == YM_CAN) {
+		rt_kprintf("[UPG] SOUTH CAN state=%s\r\n",
+			chrg_ymodem_state_name(ystate));
 		pCOMM->tx_buf[0] = YM_CAN;
 		pCOMM->tx_buf[1] = YM_CAN;
 		pCOMM->tx_len = 2;
@@ -1854,6 +2029,9 @@ static rt_uint8_t ymodem_send(struct chrg_comm_t *pCOMM)
 		timeout_ms = (ystate == Ymodem_Rec_Start) ?
 			YMODEM_META_ACK_TIMEOUT_MS : YMODEM_DATA_ACK_TIMEOUT_MS;
 		if ((now - g_ymodem_send_tick) >= rt_tick_from_millisecond(timeout_ms)) {
+			rt_kprintf("[UPG] ACK timeout state=%s retry=%u\r\n",
+				chrg_ymodem_state_name(ystate),
+				(unsigned int)g_ymodem_retry_count);
 			if (g_ymodem_retry_count >= YMODEM_MAX_RETRIES) {
 				pCOMM->tx_buf[0] = YM_CAN;
 				pCOMM->tx_buf[1] = YM_CAN;
@@ -2444,11 +2622,14 @@ static eMBException chrg_comm_apply_sink_effect(rt_uint8_t ch,
 			 */
 			if (diff_info.cc_changed && protocol_data_changed) {
 				/* Protocol-before-CC test flow is disabled in this version. */
-				pReal->sub = IDX_SET_SINK_CC_BEFORE_PD;
+				pReal->sub = diff_info.cv_changed ?
+					IDX_SET_SINK_CC_BEFORE_PD_WITH_MODE :
+					IDX_SET_SINK_CC_BEFORE_PD;
 			} else if (diff_info.cc_changed) {
 				pReal->sub = IDX_SET_SINK_CCLINE;
 			} else {
-				pReal->sub = IDX_SET_SINK_PD_ONLY;
+				pReal->sub = diff_info.cv_changed ?
+					IDX_SET_SINK_PD_WITH_MODE : IDX_SET_SINK_PD_ONLY;
 			}
 			pReal->sink.work_mode = SINK_WORK_HANDSHAKE_PREPARE;
 		} else if (protocol_voltage_only || protocol_current_change) {
@@ -2457,7 +2638,8 @@ static eMBException chrg_comm_apply_sink_effect(rt_uint8_t ch,
 			 * 低电流待机本身已经WORK_STOP，无需重复提交卸载命令；运行中
 			 * 则等待实际电流降到安全范围后再重发协议。
 			 */
-			pReal->sub = IDX_SET_SINK_PD_ONLY;
+			pReal->sub = diff_info.cv_changed ?
+				IDX_SET_SINK_PD_WITH_MODE : IDX_SET_SINK_PD_ONLY;
 			if (old_work_mode == SINK_WORK_LOAD_STANDBY) {
 				pReal->sink.work_mode = SINK_WORK_WAIT;
 			} else {
@@ -2792,6 +2974,11 @@ static int chrg_sink_diff_send_reg(eIDX_SOU_CH ch,
 	rt_uint16_t vals[2];
 	rt_uint8_t count = 0;
 
+	if (pDiff->cv_changed) {
+		regs[count] = REG_MODE;
+		vals[count++] = pReal->CV_mode;
+	}
+
 	if (pReal->CV_mode == 0x01) {
 		if (pDiff->voltage_changed) {
 			regs[count] = REG_VOLTAGE_OUT + 1;
@@ -2801,11 +2988,6 @@ static int chrg_sink_diff_send_reg(eIDX_SOU_CH ch,
 		regs[count] = REG_CURRENT_OUT + 1;
 		vals[count++] = pReal->sink.loadc;
 	}
-	if (pDiff->cv_changed) {
-		regs[count] = REG_MODE;
-		vals[count++] = pReal->CV_mode;
-	}
-
 	if ((count > 0) && (chrg_sou_com_batch_submit(ch, regs, vals, count) != 0)) {
 		LOG_E("CH%d sink diff batch submit failed", ch + 1);
 		return -1;
diff --git a/apps/chrg/applications/thread/chrg_comm.h b/apps/chrg/applications/thread/chrg_comm.h
index 9f294a6..1f3687d 100644
--- a/apps/chrg/applications/thread/chrg_comm.h
+++ b/apps/chrg/applications/thread/chrg_comm.h
@@ -1,7 +1,7 @@
 /****************************************************************************
 文件名称   : chrg_comm.h
 完成日期   : 
-当前版本号 : V1.1.9
+当前版本号 : V1.1.10
 主要功能   : 实现对外通讯协议 MODBUS 服务端，以独立线程等待处理响应请求数据。
 版本历史   : 创建原始版本
 说明      : 
diff --git a/apps/chrg/applications/thread/chrg_north.c b/apps/chrg/applications/thread/chrg_north.c
index d520023..16108f8 100644
--- a/apps/chrg/applications/thread/chrg_north.c
+++ b/apps/chrg/applications/thread/chrg_north.c
@@ -1,7 +1,7 @@
 /****************************************************************************
 文件名称   : chrg_north.c
 完成日期   : 
-当前版本号 : V1.1.9
+当前版本号 : V1.1.10
 主要功能   : 实现北向通信交互，包括接收命令解析，发送请求命令，切换通路。以独立线程处理。
 版本历史   : 创建原始版本
 说明      : 
@@ -28,11 +28,8 @@
 #define SOURCE_VOLT_RETRY_FRAMES        3U  // Source电压持续超差后的重发确认帧数
 #define SOURCE_QC_MIN_VOLT_MV        5000U  // QC2.0/QC3.0允许使用的最低目标电压
 #define SOURCE_QC_SWITCH_ERROR        0x04U // Source协议或CC切换失败错误位
-#define SINK_CURRENT_START_GRACE_MS   200U  // Sink启动后暂不判断无电流的保护时间
 #define SINK_VOLT_STABLE_ERROR_MV         2000U // Sink实际电压与协议目标电压的最大允许误差
-#define SINK_VOLT_5V_TARGET_MV            5000U // VSafe5V目标电压，需延长稳定确认时间
-#define SINK_VOLT_CONFIRM_NORMAL_COUNT       5U // 非5V目标连续有效电压确认帧数
-#define SINK_VOLT_CONFIRM_5V_COUNT          15U // 5V目标连续有效电压确认帧数，避免把握手阶段VSafe5V误判为协议稳定
+/* Sink电压稳定确认参数已迁移至chrg_sink.h，供chrg_sink_volt_judge使用。 */
 
 /*****************************************************************
 函数名称： chrg_source_apply_protocol_voltage_rule
@@ -84,22 +81,6 @@ static rt_bool_t chrg_sink_voltage_is_stable(rt_uint16_t actual_volt_mv,
 		RT_TRUE : RT_FALSE;
 }
 
-/*****************************************************************
-函数名称： chrg_sink_voltage_confirm_count
-函数描述： 根据Sink协议目标电压选择进入RUNING前所需的连续稳定帧数
-输入参数： target_volt_mv:当前协议申请的目标电压，单位mV
-输出参数： -
-返回说明： 5V目标返回延长确认帧数，其它目标返回普通确认帧数
-其它说明： 快充协议切换时总线会先经过VSafe5V；当目标本身也是5V时，
-          单凭电压值无法区分过渡阶段和协议稳定阶段，因此增加确认时间，
-          防止电子负载提前启动后导致协议板复位
-*****************************************************************/
-static rt_uint8_t chrg_sink_voltage_confirm_count(rt_uint16_t target_volt_mv)
-{
-	return (target_volt_mv == SINK_VOLT_5V_TARGET_MV) ?
-		SINK_VOLT_CONFIRM_5V_COUNT : SINK_VOLT_CONFIRM_NORMAL_COUNT;
-}
-
 /*****************************************************************
 函数名称： chrg_source_voltage_control
 函数描述： 根据目标电压与实际电压统一控制Source电压下发和重试
@@ -231,110 +212,29 @@ void chrg_source_setting(rt_uint8_t *frame_data, eIDX_SOU_CH idx,
 
 /*****************************************************************
 函数名称： chrg_sink_parse
-函数描述： 解析北向负载板回码并根据电压、电流反馈驱动Sink状态机
+函数描述： 解析北向负载板0x20回码，提取D+/D-电压到VZ/VF
 输入参数： frame_data:完整北向回码 idx:当前通道 pSW:通道控制结构体
           pNOR:北向总控结构体
-输出参数： 更新VZ、VF、低压计数、稳定电压计数、无电流计数及sink.work_mode
+输出参数： 更新pSW->VZ(D+)、pSW->VF(D-)
 返回说明： -
-其它说明： 电压连续低于门槛进入LOW；掉电处理恢复副继电器后，电压重新
-          出现时先重设协议和CC；一帧有效电压达到目标附近即进入RUNING
+其它说明： Sink电压状态机判定已迁移至chrg_sink_volt_judge，
+          由北向轮询线程基于eload.c更新的Now_voltage驱动
 *****************************************************************/
 void chrg_sink_parse(rt_uint8_t *frame_data, eIDX_SOU_CH idx, 
                        struct chrg_switch_t *pSW, struct chrg_north_t *pNOR)
 {
-	rt_uint16_t volt_mv = ((frame_data[4] << 8) | frame_data[5]) * 10;
-	rt_uint8_t stable_confirm_count;
-	static rt_uint8_t volt_low[TOTAL_SOU_CHS] = {0};
-	static rt_uint8_t no_curr[TOTAL_SOU_CHS] = {0};
-	static rt_uint8_t volt_set_ok[TOTAL_SOU_CHS] = {0};
-	static rt_uint8_t volt_stable_count[TOTAL_SOU_CHS] = {0};
-	static rt_tick_t running_start_tick[TOTAL_SOU_CHS] = {0};
-
 	if ((idx >= TOTAL_SOU_CHS) || (pSW == RT_NULL)) {
 		return;
 	}
-	stable_confirm_count = chrg_sink_voltage_confirm_count(
-		pSW->sink.pro_loadv);
 
 	pSW->VZ = ((frame_data[14] << 8) | frame_data[15]);
 	pSW->VF = ((frame_data[16] << 8) | frame_data[17]);
 
 #if NORTH_SINK_DEBUG
-	LOG_D("Sink[%d] real volt: %d mV", idx, volt_mv);
+	LOG_D("Sink[%d] real volt: %d mV", idx,
+		((frame_data[4] << 8) | frame_data[5]) * 10);
 #endif
-	
-	if(pSW->sink.On_work == 1 && pSW->sink.test.test_mode == 0) {
-		if (volt_mv <= WORK_MIN_VOLT) { // 电压过低，禁止进入工作状态机
-			volt_stable_count[idx] = 0;
-			if (volt_set_ok[idx] == 1) {
-				if (++volt_low[idx] >= 50) {
-					volt_set_ok[idx] = 0;
-					no_curr[idx] = 0;
-					//pSW->sink.work_mode = SINK_WORK_LOW;
-				}
-			}
-		}
-		else{		// 电压稳定时执行工作状态机（继电器/工作模式切换）
-			volt_low[idx] = 0;
-			volt_set_ok[idx] = 1;
-			pSW->change_flag = 0;
-			if (pSW->sink.work_mode == SINK_WORK_LOW_MONITOR) {
-				/* 副继电器恢复后首次重新检测到输入电压，只启动协议重握手。
-				 * 当前回码不计入稳定电压次数，防止跳过协议设置直接带载。 */
-				volt_stable_count[idx] = 0;
-				no_curr[idx] = 0;
-				//pSW->sub = IDX_SET_SINK_CC_BEFORE_PD;
-				pSW->sink.work_mode = SINK_WORK_WAIT;
-			} else if ((pSW->sink.work_mode == SINK_WORK_LOW) ||
-				(pSW->sink.work_mode == SINK_WORK_LOW_AUX_WAIT)) {
-				/* 掉电安全批次完成前，即使收到残留回码也不得进入RUNING。 */
-				volt_stable_count[idx] = 0;
-				no_curr[idx] = 0;
-			}
-			else if (chrg_sink_voltage_is_stable(volt_mv,
-				pSW->sink.pro_loadv)) {
-				if ((pSW->sink.work_mode != SINK_WORK_RUNING) &&
-					(pSW->sink.work_mode != SINK_WORK_LOAD_STANDBY)) {
-					if (volt_stable_count[idx] < stable_confirm_count) {
-						volt_stable_count[idx]++;
-					}
-					if (volt_stable_count[idx] >= stable_confirm_count) {
-						/* 回码已经过CRC、ID、命令和配置版本校验，并连续达到当前
-						 * 目标对应的确认帧数；5V采用更长窗口过滤VSafe5V过渡阶段。 */
-						volt_stable_count[idx] = 0;
-						pSW->sink.work_mode = SINK_WORK_RUNING;
-						running_start_tick[idx] = rt_tick_get();
-						no_curr[idx] = 0;
-					}
-				} else if (pSW->sink.work_mode == SINK_WORK_LOAD_STANDBY) {
-					/* 协议保持在线但电子负载主动停止，不执行无电流重试。 */
-					volt_stable_count[idx] = 0;
-					no_curr[idx] = 0;
-				} else if ((pSW->Now_current > 200) ||
-					(pSW->sink.loadc < 200)) {
-					volt_stable_count[idx] = 0;
-					no_curr[idx] = 0;
-				} else if ((rt_tick_t)(rt_tick_get() - running_start_tick[idx]) >=
-					rt_tick_from_millisecond(SINK_CURRENT_START_GRACE_MS)) {
-					volt_stable_count[idx] = 0;
-					if (++no_curr[idx] >= 2) {
-						pSW->sink.work_mode = SINK_WORK_WAIT;
-						no_curr[idx] = 0;
-					}
-				}
-			} else {
-				volt_stable_count[idx] = 0;
-				no_curr[idx] = 0;
-			}
-		}
-	}
-	else{
-		volt_low[idx] = 0;
-		no_curr[idx] = 0;
-		volt_set_ok[idx] = 0;
-		volt_stable_count[idx] = 0;
-	}
-	chrg_sink_work(idx,pSW);
+	(void)pNOR;
 }
 
 struct chrg_north_t chrgnorth = {
diff --git a/apps/chrg/applications/thread/chrg_north.h b/apps/chrg/applications/thread/chrg_north.h
index 8ad285d..24d3c99 100644
--- a/apps/chrg/applications/thread/chrg_north.h
+++ b/apps/chrg/applications/thread/chrg_north.h
@@ -21,12 +21,12 @@
 
 #define LEN_FRAME_HEAD		(4)			// [帧长, 0x00, id, 命令]
 #define MIN_FRAME_LENGTH	(5)			// 帧最短5字节
-#define WORK_MIN_VOLT			3000			// 工作电压下限，单位mV
+#define WORK_MIN_VOLT			500			// 工作电压下限，单位mV
 #define NORTH_FRAME_DEBUG      0x00    // 北向UART原始收发帧
 #define NORTH_SOURCE_DEBUG     0x01    // Source协议解析及组帧
-#define NORTH_SINK_DEBUG       0x00    // Sink协议解析及组帧
+#define NORTH_SINK_DEBUG       0x01    // Sink协议解析及组帧
 #define SOUTH_FRAME_DEBUG      0x00    // 南向UART原始收发帧
-#define SOUTH_COMMAND_DEBUG    0x01    // 南向寄存器写命令
+#define SOUTH_COMMAND_DEBUG    0x00    // 南向寄存器写命令
 #define COMM_FRAME_DEBUG       0x00    // COM UART原始收发帧
 #define COMM_DEBUG             0x00    // COM寄存器读写过程
 #define COMM_TRIM_DEBUG        0x00    // COM校准参数解析
diff --git a/apps/chrg/applications/thread/chrg_roll_nor.c b/apps/chrg/applications/thread/chrg_roll_nor.c
index c70d52b..7b8a87a 100644
--- a/apps/chrg/applications/thread/chrg_roll_nor.c
+++ b/apps/chrg/applications/thread/chrg_roll_nor.c
@@ -1,7 +1,7 @@
 /****************************************************************************
 文件名称   : chrg_roll_nor.c
 完成日期   : 
-当前版本号 : V1.1.9
+当前版本号 : V1.1.10
 主要功能   : 实现北向通信轮巡请求命令。以独立线程处理。
 版本历史   : 创建原始版本
 说明      : 
@@ -250,8 +250,33 @@ static rt_bool_t chrg_roll_nor_sink_wait_process(rt_uint8_t ch,
 		return RT_TRUE;
 	}
 
+	if (pSW->sub == IDX_SET_SINK_MODE_AFTER_PD) {
+		rt_uint16_t reg = REG_MODE;
+		rt_uint16_t value = pSW->CV_mode;
+
+		if (chrg_sou_com_batch_submit((eIDX_SOU_CH)ch, &reg, &value, 1U) != 0) {
+			return RT_TRUE;
+		}
+		pSW->sub = IDX_WAIT_SINK_MODE_AFTER_PD;
+		return RT_TRUE;
+	}
+
+	if (pSW->sub == IDX_WAIT_SINK_MODE_AFTER_PD) {
+		if (chrg_sou_com_batch_is_pending((eIDX_SOU_CH)ch)) {
+			return RT_TRUE;
+		}
+		if (chrg_sou_com_batch_get_result((eIDX_SOU_CH)ch) != 1) {
+			pSW->sub = IDX_SET_SINK_MODE_AFTER_PD;
+			return RT_TRUE;
+		}
+		pSW->sub = IDX_GET_SINK_VC;
+		chrg_roll_nor_sink_query_wait_start(ch);
+		return RT_TRUE;
+	}
+
 	if ((pSW->sub != IDX_WAIT_SINK_CC) &&
-		(pSW->sub != IDX_WAIT_SINK_CC_BEFORE_PD)) {
+		(pSW->sub != IDX_WAIT_SINK_CC_BEFORE_PD) &&
+		(pSW->sub != IDX_WAIT_SINK_CC_BEFORE_PD_WITH_MODE)) {
 		/* COM在等待期间提交新配置时，清理旧事务留下的CC计时记录。 */
 		g_sink_cc_wait_mask &= (rt_uint8_t)~bit;
 		g_sink_cc_wait_start[ch] = 0U;
@@ -262,8 +287,10 @@ static rt_bool_t chrg_roll_nor_sink_wait_process(rt_uint8_t ch,
 		}
 	} else {
 		if ((g_sink_cc_wait_mask & bit) == 0U) {
-			if (pSW->sub == IDX_WAIT_SINK_CC_BEFORE_PD) {
-				pSW->sub = IDX_SET_SINK_PD;
+			if ((pSW->sub == IDX_WAIT_SINK_CC_BEFORE_PD) ||
+				(pSW->sub == IDX_WAIT_SINK_CC_BEFORE_PD_WITH_MODE)) {
+				pSW->sub = (pSW->sub == IDX_WAIT_SINK_CC_BEFORE_PD_WITH_MODE) ?
+					IDX_SET_SINK_PD_WITH_MODE : IDX_SET_SINK_PD;
 			} else {
 				pSW->sub = IDX_GET_SINK_VC;
 				chrg_roll_nor_sink_query_wait_start(ch);
@@ -275,14 +302,16 @@ static rt_bool_t chrg_roll_nor_sink_wait_process(rt_uint8_t ch,
 			return RT_TRUE;
 		}
 
-		if (pSW->sub == IDX_WAIT_SINK_CC_BEFORE_PD) {
+		if ((pSW->sub == IDX_WAIT_SINK_CC_BEFORE_PD) ||
+			(pSW->sub == IDX_WAIT_SINK_CC_BEFORE_PD_WITH_MODE)) {
 			/* CC先设置完成后进入协议设置，不立即查询电压。 */
 			g_sink_query_throttle[ch] = RT_FALSE;
 			g_sink_query_first_pending[ch] = RT_FALSE;
 			g_sink_query_tick[ch] = 0U;
 			g_sink_cc_wait_mask &= (rt_uint8_t)~bit;
 			g_sink_cc_wait_start[ch] = 0U;
-			pSW->sub = IDX_SET_SINK_PD;
+			pSW->sub = (pSW->sub == IDX_WAIT_SINK_CC_BEFORE_PD_WITH_MODE) ?
+				IDX_SET_SINK_PD_WITH_MODE : IDX_SET_SINK_PD;
 			return RT_TRUE;
 		}
 
@@ -545,12 +574,14 @@ static rt_uint8_t chrg_roll_nor_expected_cmd(const struct chrg_switch_t *pSW)
 			return SINK_CMD_GET_PD;
 		case IDX_SET_SINK_PD:
 		case IDX_SET_SINK_PD_ONLY:
+		case IDX_SET_SINK_PD_WITH_MODE:
 #if 0
 		case IDX_SET_SINK_PD_BEFORE_CC:
 #endif
 			return pSW->sink.protocol;
 		case IDX_SET_SINK_CCLINE:
 		case IDX_SET_SINK_CC_BEFORE_PD:
+		case IDX_SET_SINK_CC_BEFORE_PD_WITH_MODE:
 			return SINK_CMD_SET_CC;
 		case IDX_SET_SINK_CCLVL:
 			return SINK_CMD_SET_LEVEL;
@@ -762,6 +793,9 @@ static int chrg_roll_nor_set(rt_uint8_t ch, struct chrg_switch_t *pSW,
 				case IDX_SET_SINK_CC_BEFORE_PD:
 					*next_sub = IDX_WAIT_SINK_CC_BEFORE_PD;
 					return sink_set_cc_line(pSW->sink.cc_set);
+				case IDX_SET_SINK_CC_BEFORE_PD_WITH_MODE:
+					*next_sub = IDX_WAIT_SINK_CC_BEFORE_PD_WITH_MODE;
+					return sink_set_cc_line(pSW->sink.cc_set);
 				case IDX_SET_SINK_CCLVL:							//CC电平
 					return sink_set_cc_lvl(pSW->sink.cc_lvl);
 				case IDX_SET_SINK_PD:
@@ -771,6 +805,9 @@ static int chrg_roll_nor_set(rt_uint8_t ch, struct chrg_switch_t *pSW,
 				case IDX_SET_SINK_PD_ONLY:
 					*next_sub = IDX_WAIT_SINK_PD_ACK;
 					return chrg_roll_nor_sink_pro_set(pSW);
+				case IDX_SET_SINK_PD_WITH_MODE:
+					*next_sub = IDX_SET_SINK_MODE_AFTER_PD;
+					return chrg_roll_nor_sink_pro_set(pSW);
 #if 0
 				case IDX_SET_SINK_PD_BEFORE_CC:
 					/* 协议回码确认后再设置CC，不提前查询电压。 */
@@ -885,7 +922,8 @@ static int chrg_roll_nor_auto_request(rt_uint8_t idx,
 						(rt_uint8_t)pSW->source.protocol);
 				} else if ((expected_id == ID_SINK) &&
 					((request_sub == IDX_SET_SINK_CCLINE) ||
-					 (request_sub == IDX_SET_SINK_CC_BEFORE_PD))) {
+					 (request_sub == IDX_SET_SINK_CC_BEFORE_PD) ||
+					 (request_sub == IDX_SET_SINK_CC_BEFORE_PD_WITH_MODE))) {
 					/* 北向Sink继电器保持接通，仅等待目标CC配置稳定。 */
 					chrg_roll_nor_sink_cc_wait_start(idx);
 				} else if ((expected_id == ID_SINK) &&
@@ -992,8 +1030,17 @@ void chrg_roll_nor_thread_entry (void *data)
 			 * 协议切换等待只推进时间状态，不发送串口命令。该检查位于enable
 			 * 过滤前，使停止或角色切换后的通道也能及时清理残留事务记录。
 			 */
-			source_waiting = chrg_roll_nor_source_wait_process(idx, pSW);
-			sink_waiting = chrg_roll_nor_sink_wait_process(idx, pSW);
+			 source_waiting = chrg_roll_nor_source_wait_process(idx, pSW);
+			 sink_waiting = chrg_roll_nor_sink_wait_process(idx, pSW);
+
+			/* 全通道Sink电压判定：使用eload实际电压Now_voltage与V_On比较，
+			 * 判定后统一由chrg_sink_work执行；短路测试由该入口负责WORK_START保活。 */
+			for (i = 0; i < TOTAL_NOR_CHS; i++) {
+				struct chrg_switch_t *psw = &pNOR->sw[i];
+				if ((psw->id == ID_SINK) && psw->sink.On_work) {
+					(void)chrg_sink_volt_judge((eIDX_SOU_CH)i, psw);
+				}
+			}
 			rt_mutex_release(pTHR->mutex);
 			if (state_work_ret != 0) {
 				/* 南向状态动作未成功入队时保留原状态，下轮重试且禁止北向先行。 */
diff --git a/apps/chrg/applications/thread/chrg_roll_nor.h b/apps/chrg/applications/thread/chrg_roll_nor.h
index 5e638a3..74d3a7f 100644
--- a/apps/chrg/applications/thread/chrg_roll_nor.h
+++ b/apps/chrg/applications/thread/chrg_roll_nor.h
@@ -1,7 +1,7 @@
 /****************************************************************************
 文件名称   : chrg_roll_nor.h
 完成日期   : 
-当前版本号 : V1.1.9
+当前版本号 : V1.1.10
 主要功能   : 实现北向通信轮巡请求命令。以独立线程处理。
 版本历史   : 创建原始版本
 说明      : 
@@ -52,6 +52,11 @@ enum {
 	IDX_SET_SINK_CC_BEFORE_PD,      // 先设置CC，稳定后再设置协议
 	IDX_WAIT_SINK_CC_BEFORE_PD,     // 等待CC稳定后进入协议设置
 	IDX_WAIT_SINK_PD_ACK,           // 协议回码确认后的非发送过渡状态
+	IDX_SET_SINK_PD_WITH_MODE,
+	IDX_SET_SINK_CC_BEFORE_PD_WITH_MODE,
+	IDX_WAIT_SINK_CC_BEFORE_PD_WITH_MODE,
+	IDX_SET_SINK_MODE_AFTER_PD,
+	IDX_WAIT_SINK_MODE_AFTER_PD,
 #if 0
 	IDX_SET_SINK_PD_BEFORE_CC,      // 先设置协议，协议回码后再设置CC
 #endif
diff --git a/apps/chrg/applications/thread/chrg_roll_sou.c b/apps/chrg/applications/thread/chrg_roll_sou.c
index 4c91f93..cc0a46d 100644
--- a/apps/chrg/applications/thread/chrg_roll_sou.c
+++ b/apps/chrg/applications/thread/chrg_roll_sou.c
@@ -16,6 +16,7 @@
 #include "chrg_thread.h"
 #include "chrg_roll_sou.h"
 #include "chrg_north.h"
+#include "chrg_sink.h"
 #include "chrg_eload.h"
 #include "chrg_utils.h"
 
@@ -25,6 +26,8 @@
 #define SOU_MUTEX_TIMEOUT_MS    100
 #define SOU_RESPONSE_TIMEOUT_MS 20
 #define SOU_COM_MAX_ATTEMPTS    3
+#define SOU_COM_BURST_MAX       10U
+#define SOU_COM_RETRY_YIELD_MS   1U
 #define SOU_REL_SWITCH_DELAY_MS 100U
 #define SOU_CHANNEL_BIT(ch)     ((rt_uint8_t)(1U << (ch)))
 
@@ -44,6 +47,8 @@ static rt_uint8_t g_sou_version_ready[TOTAL_SOU_CHS] = {0U};
  * 回码错误或超时时游标保持不变，使同一条命令优先完成重发，避免破坏
  * 本通道批次内的寄存器执行顺序。 */
 static rt_uint8_t g_sou_com_batch_rr_next_ch = 0U;
+static rt_uint8_t g_sou_com_batch_burst_ch = TOTAL_SOU_CHS;
+static rt_uint8_t g_sou_com_batch_burst_count = 0U;
 
 struct chrg_rollsou_t chrgrollsou = {
 	.run = RUN_AUTO,
@@ -534,6 +539,29 @@ static int sou_com_batch_next(rt_uint8_t *ch, rt_uint16_t *reg, rt_uint16_t *val
 	}
 
 	now = rt_tick_get();
+	/* 短路保活的WORK_START达到周期后优先下发，避免长批次挤占30ms保活窗口。 */
+	for (offset = 0; offset < TOTAL_SOU_CHS; offset++) {
+		idx = (rt_uint8_t)((g_sou_com_batch_rr_next_ch + offset) %
+			TOTAL_SOU_CHS);
+		sou_com_batch_ch_t *pBatch = &g_sou_com_batch.ch[idx];
+		if ((pBatch->pending != RT_TRUE) ||
+			(pBatch->cur_idx >= pBatch->reg_cnt) ||
+			(pBatch->reg_list[pBatch->cur_idx] != REG_WORK) ||
+			(pBatch->val_list[pBatch->cur_idx] != WORK_START) ||
+			(chrgnorth.sw[idx].id != ID_SINK) ||
+			(chrgnorth.sw[idx].sink.work_mode != SINK_WORK_ON_TEST_SHORT) ||
+			(chrgnorth.sw[idx].sink.test.test_mode != SINK_TEST_SHORT) ||
+			((pBatch->next_send_tick != 0U) &&
+			 ((rt_int32_t)(now - pBatch->next_send_tick) < 0))) {
+			continue;
+		}
+		pBatch->next_send_tick = 0U;
+		*ch = idx;
+		*reg = pBatch->reg_list[pBatch->cur_idx];
+		*value = pBatch->val_list[pBatch->cur_idx];
+		rt_mutex_release(pTHR->mutex);
+		return 1;
+	}
 	/* 从上一次成功命令的下一个通道开始查找，使多通道批次按
 	 * "CH1一条 -> CH2一条 -> ..." 交替执行，而不是低编号通道独占总线。 */
 	for (offset = 0; offset < TOTAL_SOU_CHS; offset++) {
@@ -592,9 +620,6 @@ static int sou_com_batch_complete(rt_uint8_t ch, rt_uint16_t reg, rt_uint16_t va
 	}
 
 	pBatch->cur_idx++;
-	/* 当前寄存器已收到匹配写回码。下一次调度从下一个通道开始；
-	 * 当前通道的下一条命令会在其它就绪通道各执行一条后继续发送。 */
-	g_sou_com_batch_rr_next_ch = (rt_uint8_t)((ch + 1U) % TOTAL_SOU_CHS);
 	/* 暂时关闭副继电器与主继电器之间的固定延时；需要恢复时重新启用本段。 */
 	if ((reg == REG_REL_ON) && (value == ALL_REL_OFF) &&
 		(pBatch->cur_idx < pBatch->reg_cnt) &&
@@ -615,6 +640,19 @@ static int sou_com_batch_complete(rt_uint8_t ch, rt_uint16_t reg, rt_uint16_t va
 		pBatch->cur_idx = 0;
 		pBatch->reg_cnt = 0;
 		pBatch->next_send_tick = 0U;
+		g_sou_com_batch_burst_ch = TOTAL_SOU_CHS;
+		g_sou_com_batch_burst_count = 0U;
+		g_sou_com_batch_rr_next_ch = (rt_uint8_t)((ch + 1U) % TOTAL_SOU_CHS);
+	} else if (g_sou_com_batch_burst_ch != ch) {
+		g_sou_com_batch_burst_ch = ch;
+		g_sou_com_batch_burst_count = 1U;
+		g_sou_com_batch_rr_next_ch = ch;
+	} else if (++g_sou_com_batch_burst_count >= SOU_COM_BURST_MAX) {
+		g_sou_com_batch_burst_ch = TOTAL_SOU_CHS;
+		g_sou_com_batch_burst_count = 0U;
+		g_sou_com_batch_rr_next_ch = (rt_uint8_t)((ch + 1U) % TOTAL_SOU_CHS);
+	} else {
+		g_sou_com_batch_rr_next_ch = ch;
 	}
 	rt_mutex_release(pTHR->mutex);
 	return 0;
@@ -635,6 +673,12 @@ int chrg_sou_com_batch_cancel(eIDX_SOU_CH ch)
 	pBatch->cur_idx = 0;
 	pBatch->reg_cnt = 0;
 	pBatch->next_send_tick = 0U;
+	if (g_sou_com_batch_burst_ch == ch) {
+		g_sou_com_batch_burst_ch = TOTAL_SOU_CHS;
+		g_sou_com_batch_burst_count = 0U;
+		g_sou_com_batch_rr_next_ch =
+			(rt_uint8_t)((ch + 1U) % TOTAL_SOU_CHS);
+	}
 	/* 已取消事务对应的优先P1量测同样失效，后续状态会重新申请新量测。 */
 	g_sou_measure_once_pending_mask &= (rt_uint8_t)~SOU_CHANNEL_BIT(ch);
 	g_sou_measure_once_active_mask &= (rt_uint8_t)~SOU_CHANNEL_BIT(ch);
@@ -734,6 +778,23 @@ static void sou_com_command_failed(rt_uint8_t ch, rt_uint16_t reg, rt_uint16_t v
 
 	(*retry_count)++;
 	if (*retry_count < SOU_COM_MAX_ATTEMPTS) {
+		struct chrg_thread_t *pTHR = &chrgthr[IDX_THR_ROLL_SOU];
+		if (rt_mutex_take(pTHR->mutex,
+			rt_tick_from_millisecond(SOU_MUTEX_TIMEOUT_MS)) == RT_EOK) {
+			sou_com_batch_ch_t *pBatch = &g_sou_com_batch.ch[ch];
+			if ((pBatch->pending == RT_TRUE) &&
+				(pBatch->cur_idx < pBatch->reg_cnt) &&
+				(pBatch->reg_list[pBatch->cur_idx] == reg) &&
+				(pBatch->val_list[pBatch->cur_idx] == value)) {
+				pBatch->next_send_tick = rt_tick_get() +
+					rt_tick_from_millisecond(SOU_COM_RETRY_YIELD_MS);
+				g_sou_com_batch_rr_next_ch =
+					(rt_uint8_t)((ch + 1U) % TOTAL_SOU_CHS);
+				g_sou_com_batch_burst_ch = TOTAL_SOU_CHS;
+				g_sou_com_batch_burst_count = 0U;
+			}
+			rt_mutex_release(pTHR->mutex);
+		}
 		return;
 	}
 
@@ -765,7 +826,7 @@ void chrg_roll_sou_thread_entry (void *data)
 	rt_uint8_t run = 0;
 	rt_uint8_t index = 0, idx = 0;
 	rt_uint8_t batch_ch = 0;
-	rt_uint8_t retry_count = 0;
+	rt_uint8_t retry_count[TOTAL_SOU_CHS] = {0};
 	rt_uint8_t command_ch = 0;
 	rt_uint8_t single_ch = 0;
 	rt_uint8_t single_part = 0;
@@ -782,6 +843,7 @@ void chrg_roll_sou_thread_entry (void *data)
 	struct chrg_thread_t *pTS = &chrgthr[IDX_THR_SOUTH];
 	struct mb_msg_t *pMB_R = RT_NULL;
 	while (1) {
+		chrg_sink_short_keepalive_process();
 		rt_mutex_take(pTHR->mutex, RT_WAITING_FOREVER);
 		run = pROLL->run;
 		single_ch = pROLL->ch;
@@ -794,7 +856,7 @@ void chrg_roll_sou_thread_entry (void *data)
 		version_probe = RT_FALSE;
 		response_part = MB_R_PART1;
 		if ((run != RUN_COM) && (run != RUN_UPDATA)) {
-			retry_count = 0;
+			rt_memset(retry_count, 0, sizeof(retry_count));
 		}
 //		rt_kprintf("------ROLL SOU START \n--------");
 		switch (run) {
@@ -853,7 +915,6 @@ void chrg_roll_sou_thread_entry (void *data)
 		{
 			int next_ret = sou_com_batch_next(&command_ch, &command_reg, &command_value);
 			if (next_ret <= 0) {
-				retry_count = 0;
 				rt_thread_mdelay(1);
 				continue;
 			}
@@ -917,10 +978,10 @@ void chrg_roll_sou_thread_entry (void *data)
 			if (response_valid) {
 				if (run == RUN_COM) {
 					if (sou_com_batch_complete(batch_ch, command_reg, command_value) == 0) {
-						retry_count = 0;
+						retry_count[batch_ch] = 0;
 					} else {
 						sou_com_command_failed(batch_ch, command_reg, command_value,
-							"batch changed", &retry_count);
+							"batch changed", &retry_count[batch_ch]);
 					}
 				} else if (run != RUN_AUTO) {
 					sou_single_command_finish(run);
@@ -938,7 +999,7 @@ void chrg_roll_sou_thread_entry (void *data)
 				}
 			} else if (run == RUN_COM) {
 				sou_com_command_failed(batch_ch, command_reg, command_value,
-					"invalid response", &retry_count);
+					"invalid response", &retry_count[batch_ch]);
 			} else {
 				LOG_E("crc failed");
 			}
@@ -954,7 +1015,7 @@ void chrg_roll_sou_thread_entry (void *data)
 			}
 			if ((run == RUN_COM) && command_valid) {
 				sou_com_command_failed(batch_ch, command_reg, command_value,
-					"timeout", &retry_count);
+					"timeout", &retry_count[batch_ch]);
 			} else if (run != RUN_AUTO) {
 				sou_single_command_finish(run);
 			}
diff --git a/apps/chrg/applications/utils/chrg_sink.c b/apps/chrg/applications/utils/chrg_sink.c
index 97361d3..9ee9355 100644
--- a/apps/chrg/applications/utils/chrg_sink.c
+++ b/apps/chrg/applications/utils/chrg_sink.c
@@ -23,6 +23,7 @@
 #define SINK_UNLOAD_QUERY_INTERVAL_MS 20U  // 卸载期间两次优先量测请求的最小间隔
 #define SINK_UNLOAD_CURRENT_MAX_MA    200U // 判定负载已安全卸载的最大实际电流
 #define SINK_UNLOAD_CONFIRM_COUNT      2U  // 连续满足低电流条件的量测帧数
+#define SINK_SHORT_KEEPALIVE_MS        30U // 短路测试WORK_START保活下发周期
 
 /* 主继电器闭合跟踪：1=已提交ALL_REL_ON（主继电器应已闭合） 0=未闭合/已断开。
  * 用于0V硬保护区分"首次开载/握手恢复"（主继电器未闭合，Now_voltage=0属正常）
@@ -38,6 +39,8 @@ static rt_uint32_t g_sink_unload_sample_seq[TOTAL_SOU_CHS] = {0};
 static rt_bool_t g_sink_unload_batch_confirmed[TOTAL_SOU_CHS] = {RT_FALSE};
 static rt_tick_t g_sink_unload_query_tick[TOTAL_SOU_CHS] = {0};
 static rt_uint8_t g_sink_unload_confirm_count[TOTAL_SOU_CHS] = {0};
+/* 记录各通道短路测试最近一次WORK_START的发送时间。 */
+static rt_tick_t g_sink_short_start_tick[TOTAL_SOU_CHS] = {0};
 
 enum {
 	SINK_UNLOAD_NEXT_RUNNING = 0,
@@ -244,11 +247,10 @@ int sink_set_pd (rt_uint8_t pd, rt_uint8_t *buf)
 static int chrg_sink_work_init(eIDX_SOU_CH idx, struct chrg_switch_t *pSW)
 {
 	struct chrg_north_t *pNOR = &chrgnorth;
-	rt_uint16_t regs[5] = {REG_REL_ON, REG_CURRENT_OUT + 1,
-		REG_MODE, Eload_Start_V_ON, 0};
-	rt_uint16_t vals[5] = {FU_REL_ON, 0, 0, 0, 0};
+	rt_uint16_t regs[6];
+	rt_uint16_t vals[6];
 	rt_bool_t first_start;
-	rt_uint8_t count = 4U;
+	rt_uint8_t count;
 
 	if ((idx >= TOTAL_SOU_CHS) || (pSW == RT_NULL)) {
 		return -1;
@@ -256,17 +258,31 @@ static int chrg_sink_work_init(eIDX_SOU_CH idx, struct chrg_switch_t *pSW)
 	/* COM进入INIT前已经设置On_work，使用原工作状态区分首次提交和后台重试。 */
 	first_start = (pSW->sink.work_mode != SINK_WORK_INIT_AUX_WAIT) ?
 		RT_TRUE : RT_FALSE;
-	vals[2] = pSW->CV_mode;
-	vals[3] = pSW->sink.volt_on <= 500 ? 500 : pSW->sink.volt_on;
 	if (pSW->sink.test.test_mode_old == SINK_TEST_SHORT) {
-		regs[count] = ModbusRTU_ShortTest_CMD_MODE_FLAG;
-		vals[count++] = ModbusRTU_DYNA_CMD_MODE_STOP;
-	} else if (pSW->sink.test.test_mode_old == SINK_TEST_OCP) {
-		regs[count] = ModbusRTU_OCPTest_CMD_MODE_FLAG;
-		vals[count++] = ModbusRTU_DYNA_CMD_MODE_STOP;
-	} else if (pSW->sink.test.test_mode_old == SINK_TEST_DYNA) {
-		regs[count] = ModbusRTU_DYNA_CMD_MODE_FLAG;
-		vals[count++] = ModbusRTU_DYNA_CMD_MODE_STOP;
+		/* 短路测试退出：先断开全部继电器，再打开辅助继电器，最后停止短路测试。 */
+		regs[0] = REG_REL_ON;						vals[0] = ALL_REL_OFF;
+		regs[1] = REG_REL_ON;						vals[1] = FU_REL_ON;
+		regs[2] = REG_CURRENT_OUT + 1;	vals[2] = 0;
+		regs[3] = REG_MODE;						vals[3] = pSW->CV_mode;
+		regs[4] = Eload_Start_V_ON;			vals[4] =
+			(pSW->sink.volt_on <= 500) ? 500 : pSW->sink.volt_on;
+		regs[5] = ModbusRTU_ShortTest_CMD_MODE_FLAG;
+		vals[5] = ModbusRTU_DYNA_CMD_MODE_STOP;
+		count = 6U;
+	} else {
+		regs[0] = REG_REL_ON;						vals[0] = FU_REL_ON;
+		regs[1] = REG_CURRENT_OUT + 1;	vals[1] = 0;
+		regs[2] = REG_MODE;						vals[2] = pSW->CV_mode;
+		regs[3] = Eload_Start_V_ON;			vals[3] =
+			(pSW->sink.volt_on <= 500) ? 500 : pSW->sink.volt_on;
+		count = 4U;
+		if (pSW->sink.test.test_mode_old == SINK_TEST_OCP) {
+			regs[count] = ModbusRTU_OCPTest_CMD_MODE_FLAG;
+			vals[count++] = ModbusRTU_DYNA_CMD_MODE_STOP;
+		} else if (pSW->sink.test.test_mode_old == SINK_TEST_DYNA) {
+			regs[count] = ModbusRTU_DYNA_CMD_MODE_FLAG;
+			vals[count++] = ModbusRTU_DYNA_CMD_MODE_STOP;
+		}
 	}
 	if (chrg_sou_com_batch_submit(idx, regs, vals, count) != 0) {
 		return -1;
@@ -814,16 +830,150 @@ static int chrg_sink_TEST_SHORT_ON(rt_uint8_t ch, struct chrg_switch_t *pSW)
 {
 	rt_uint16_t regs[3] = {ModbusRTU_ShortTest_Hold_Time,ModbusRTU_ShortTest_CMD_MODE_FLAG, REG_WORK};
 	rt_uint16_t vals[3] = {0,0,0};
-	if(pSW->sink.test.short_test.set_mode == 0)
-	{
-		vals[0] = pSW->sink.test.short_test.hold_time;
-		vals[1] = ModbusRTU_DYNA_CMD_MODE_RUN_NO_CURR;
-	}
-	else{
-		vals[1] = ModbusRTU_DYNA_CMD_MODE_RUN_ALWAYS_KEPP;
-	}
+	/* 外部工程固定短路测试保持60秒且不带载。 */
+	vals[0] = 60000;
+	vals[1] = ModbusRTU_DYNA_CMD_MODE_RUN_NO_CURR;
 	vals[2] = WORK_START;
-	return chrg_sou_com_batch_submit((eIDX_SOU_CH)ch, regs, vals, 3);
+	if (chrg_sou_com_batch_submit((eIDX_SOU_CH)ch, regs, vals, 3) == 0) {
+		g_sink_short_start_tick[ch] = rt_tick_get();
+		return 0;
+	}
+	return -1;
+}
+
+/* 短路测试保持期间只补发WORK_START，避免重复写入测试配置并堆积批次。 */
+static int chrg_sink_TEST_SHORT_KEEPALIVE(rt_uint8_t ch)
+{
+	rt_uint16_t reg = REG_WORK;
+	rt_uint16_t val = WORK_START;
+	rt_tick_t now = rt_tick_get();
+
+	if ((rt_tick_t)(now - g_sink_short_start_tick[ch]) <
+		rt_tick_from_millisecond(SINK_SHORT_START_INTERVAL_MS)) {
+		return 0;
+	}
+	if (chrg_sou_com_batch_is_pending((eIDX_SOU_CH)ch)) {
+		return 0;
+	}
+	if (chrg_sou_com_batch_submit((eIDX_SOU_CH)ch, &reg, &val, 1U) == 0) {
+		g_sink_short_start_tick[ch] = now;
+	}
+	return 0;
+}
+
+/*****************************************************************
+函数名称： chrg_sink_voltage_confirm_count
+函数描述： 根据Sink协议目标电压选择进入RUNING前所需的连续稳定帧数
+输入参数： target_volt_mv:当前协议申请的目标电压，单位mV
+输出参数： -
+返回说明： 5V目标返回延长确认帧数，其它目标返回普通确认帧数
+其它说明： 由chrg_sink_volt_judge调用
+*****************************************************************/
+static rt_uint8_t chrg_sink_voltage_confirm_count(rt_uint16_t target_volt_mv)
+{
+	return (target_volt_mv == SINK_VOLT_5V_TARGET_MV) ?
+		SINK_VOLT_CONFIRM_5V_COUNT : SINK_VOLT_CONFIRM_NORMAL_COUNT;
+}
+
+/*****************************************************************
+函数名称： chrg_sink_volt_judge
+函数描述： 使用南向功率板实际电压Now_voltage与V_On比较，驱动负载进入RUNING
+输入参数： idx:南向通道 pSW:通道控制结构体
+输出参数： 更新sink.work_mode并调用chrg_sink_work
+返回说明： 0:处理完成 <0:参数错误
+*****************************************************************/
+int chrg_sink_volt_judge(eIDX_SOU_CH idx, struct chrg_switch_t *pSW)
+{
+	rt_uint8_t stable_confirm_count;
+	static rt_uint8_t volt_low[TOTAL_SOU_CHS] = {0};
+	static rt_uint8_t no_curr[TOTAL_SOU_CHS] = {0};
+	static rt_uint8_t volt_set_ok[TOTAL_SOU_CHS] = {0};
+	static rt_uint8_t volt_stable_count[TOTAL_SOU_CHS] = {0};
+	static rt_tick_t running_start_tick[TOTAL_SOU_CHS] = {0};
+
+	if ((idx >= TOTAL_SOU_CHS) || (pSW == RT_NULL)) {
+		return -1;
+	}
+	stable_confirm_count = chrg_sink_voltage_confirm_count(
+		pSW->sink.pro_loadv);
+
+	if ((pSW->sink.On_work == 1) && (pSW->sink.test.test_mode == 0)) {
+		if (pSW->Now_voltage <= WORK_MIN_VOLT) {
+			volt_stable_count[idx] = 0;
+			if (volt_set_ok[idx] == 1 && ++volt_low[idx] >= 50) {
+				volt_set_ok[idx] = 0;
+				no_curr[idx] = 0;
+			}
+		} else {
+			volt_low[idx] = 0;
+			volt_set_ok[idx] = 1;
+			pSW->change_flag = 0;
+			if (pSW->sink.work_mode == SINK_WORK_LOW_MONITOR) {
+				/* 副继电器恢复后首次重新检测到输入电压，只启动协议重握手。 */
+				volt_stable_count[idx] = 0;
+				no_curr[idx] = 0;
+				pSW->sink.work_mode = SINK_WORK_WAIT;
+			} else if ((pSW->sink.work_mode == SINK_WORK_LOW) ||
+				(pSW->sink.work_mode == SINK_WORK_LOW_AUX_WAIT)) {
+				/* 掉电安全批次完成前，不得进入RUNING。 */
+				volt_stable_count[idx] = 0;
+				no_curr[idx] = 0;
+			} else if (pSW->Now_voltage > pSW->sink.volt_on) {
+				if ((pSW->sink.work_mode != SINK_WORK_RUNING) &&
+					(pSW->sink.work_mode != SINK_WORK_LOAD_STANDBY)) {
+					if (volt_stable_count[idx] < stable_confirm_count) {
+						volt_stable_count[idx]++;
+					}
+					if (volt_stable_count[idx] >= stable_confirm_count) {
+						/* 连续达到当前目标对应的确认帧数后进入RUNING。 */
+						volt_stable_count[idx] = 0;
+						pSW->sink.work_mode = SINK_WORK_RUNING;
+						running_start_tick[idx] = rt_tick_get();
+						no_curr[idx] = 0;
+					}
+				} else if (pSW->sink.work_mode == SINK_WORK_LOAD_STANDBY) {
+					volt_stable_count[idx] = 0;
+					no_curr[idx] = 0;
+				} else if ((pSW->Now_current > 200) || (pSW->sink.loadc < 200)) {
+					volt_stable_count[idx] = 0;
+					no_curr[idx] = 0;
+				} else if ((rt_tick_t)(rt_tick_get() - running_start_tick[idx]) >=
+					rt_tick_from_millisecond(SINK_CURRENT_START_GRACE_MS)) {
+					volt_stable_count[idx] = 0;
+					if (++no_curr[idx] >= 2) {
+						pSW->sink.work_mode = SINK_WORK_WAIT;
+						no_curr[idx] = 0;
+					}
+				}
+			} else {
+				volt_stable_count[idx] = 0;
+				no_curr[idx] = 0;
+			}
+		}
+	} else {
+		volt_low[idx] = 0;
+		no_curr[idx] = 0;
+		volt_set_ok[idx] = 0;
+		volt_stable_count[idx] = 0;
+	}
+	return chrg_sink_work(idx, pSW);
+}
+
+void chrg_sink_short_keepalive_process(void)
+{
+	eIDX_SOU_CH idx;
+	struct chrg_switch_t *pSW;
+
+	for (idx = IDX_SOU_CH1; idx < TOTAL_SOU_CHS; idx++) {
+		pSW = &chrgnorth.sw[idx];
+		if ((pSW->id != ID_SINK) ||
+			(pSW->sink.work_mode != SINK_WORK_ON_TEST_SHORT) ||
+			(pSW->sink.test.test_mode != SINK_TEST_SHORT)) {
+			g_sink_short_start_tick[idx] = 0U;
+			continue;
+		}
+		(void)chrg_sink_TEST_SHORT_KEEPALIVE(idx);
+	}
 }
 
 /*****************************************************************
@@ -877,14 +1027,21 @@ int chrg_sink_work(eIDX_SOU_CH idx, struct chrg_switch_t *pSW)
 	}
 	work_mode = pSW->sink.work_mode;
 	workmode = work_mode;
+	if (work_mode != SINK_WORK_ON_TEST_SHORT) {
+		g_sink_short_start_tick[idx] = 0;
+	}
 	/* 异步等待状态需要持续检查批次或新量测，其余相同状态保持去重。 */
 	if ((work_mode == last_state[idx]) &&
+		(work_mode != SINK_WORK_ON_TEST_SHORT) &&
 		(work_mode != SINK_WORK_INIT_AUX_WAIT) &&
 		(work_mode != SINK_WORK_STOP_WAIT) &&
 		(work_mode != SINK_WORK_STOP_RELAY_WAIT) &&
 		(work_mode != SINK_WORK_UNLOAD_WAIT) &&
 		(work_mode != SINK_WORK_LOW_AUX_WAIT) &&
 		(work_mode != SINK_WORK_HANDSHAKE_WAIT)) {
+		if (work_mode == SINK_WORK_ON_TEST_SHORT) {
+			return chrg_sink_TEST_SHORT_KEEPALIVE(idx);
+		}
 		return 0;
 	}
 	switch(work_mode){
@@ -904,7 +1061,11 @@ int chrg_sink_work(eIDX_SOU_CH idx, struct chrg_switch_t *pSW)
 			ret = chrg_sink_TEST_DYNA_ON(idx,pSW);
 		break;	
 		case SINK_WORK_ON_TEST_SHORT:
-			ret = chrg_sink_TEST_SHORT_ON(idx,pSW);
+			if (work_mode != last_state[idx]) {
+				ret = chrg_sink_TEST_SHORT_ON(idx, pSW);
+			} else {
+				ret = chrg_sink_TEST_SHORT_KEEPALIVE(idx);
+			}
 		break;
 		case SINK_WORK_ON_TEST_OCP:
 			ret = chrg_sink_TEST_OCP_ON(idx,pSW);
diff --git a/apps/chrg/applications/utils/chrg_sink.h b/apps/chrg/applications/utils/chrg_sink.h
index ecce436..92a185a 100644
--- a/apps/chrg/applications/utils/chrg_sink.h
+++ b/apps/chrg/applications/utils/chrg_sink.h
@@ -21,6 +21,8 @@ struct chrg_switch_t;
 #define SINK_TEST_SHORT 1
 #define SINK_TEST_OCP   2
 #define SINK_TEST_DYNA  3
+/* 短路测试期间按该周期补发WORK_START，防止功率板因超时停止。 */
+#define SINK_SHORT_START_INTERVAL_MS  30U
 //短路测试结构体
 struct test_short {
     rt_uint16_t         hold_time;           // 短路测试时间
@@ -208,6 +210,12 @@ enum {
  */
 #define SINK_LOAD_ENABLE_MIN_MA       100U
 
+/* Sink电压稳定确认参数，供chrg_sink_volt_judge使用。 */
+#define SINK_VOLT_5V_TARGET_MV            5000U
+#define SINK_VOLT_CONFIRM_NORMAL_COUNT       5U
+#define SINK_VOLT_CONFIRM_5V_COUNT          15U
+#define SINK_CURRENT_START_GRACE_MS         200U
+
 /* 主继电器闭合后的0V持续监控：由北向轮询线程每轮调用，掉电立即转掉电保护。 */
 extern int chrg_sink_volt_low_protect(eIDX_SOU_CH idx, struct chrg_switch_t *pSW);
 
@@ -409,6 +417,8 @@ extern void chrg_nor_sink_test_run(rt_uint8_t ch, struct chrg_switch_t *pSW);
 /* 判断普通负载的当前设定是否允许启动电子负载。 */
 extern rt_bool_t chrg_sink_load_should_start(const struct chrg_switch_t *pSW);
 extern int chrg_sink_work(eIDX_SOU_CH idx, struct chrg_switch_t *pSW);
+extern int chrg_sink_volt_judge(eIDX_SOU_CH idx, struct chrg_switch_t *pSW);
+extern void chrg_sink_short_keepalive_process(void);
 #endif
 
 
diff --git a/apps/chrg/applications/utils/chrg_source.c b/apps/chrg/applications/utils/chrg_source.c
index 01626a3..51276f4 100644
--- a/apps/chrg/applications/utils/chrg_source.c
+++ b/apps/chrg/applications/utils/chrg_source.c
@@ -1,7 +1,7 @@
 /****************************************************************************
 文件名称   : chrg_source.c
 完成日期   : 
-当前版本号 : V1.1.9
+当前版本号 : V1.1.10
 主要功能   : 北向数据source请求数据填充及发送。
 版本历史   : 创建原始版本
 说明      : 
diff --git a/apps/chrg/applications/utils/chrg_source.h b/apps/chrg/applications/utils/chrg_source.h
index 3ddb1a8..d45f908 100644
--- a/apps/chrg/applications/utils/chrg_source.h
+++ b/apps/chrg/applications/utils/chrg_source.h
@@ -1,7 +1,7 @@
 /****************************************************************************
 文件名称   : chrg_source.c
 完成日期   : 
-当前版本号 : V1.1.9
+当前版本号 : V1.1.10
 主要功能   : 北向数据source请求数据填充及发送，命令字定义。
 版本历史   : 创建原始版本
 说明      : 
diff --git a/docs/Allegro.jrl b/docs/Allegro.jrl
index b56c5ce..f472350 100644
--- a/docs/Allegro.jrl
+++ b/docs/Allegro.jrl
@@ -1,2519 +1,953 @@
-\t (00:00:05) Allegro 17.2 S079 Windows SPB 64-bit Edition
-\t (00:00:05)     Journal start - Tue Aug 25 19:43:26 2026
-\t (00:00:05)         Host=DESKTOP-5RA9F3K User=Adminuser Pid=39932 CPUs=20
-\t (00:00:05) CmdLine= D:\Cadence\SPB_17.2\tools\bin\Allegro.exe D:\HC-PMP-SW\Power_ControlPannel\MP_Control_sw_405\MP_SW_Chrg\chrg\docs\HC_DFCD_Protocol_V3_0.brd
-\t (00:00:05) 
-   (00:00:05) Loading axlcore.cxt 
-\t (00:00:06) Opening existing design...
-\i (00:00:06) QtSignal SPBFoldDockArea FoldAreaTabWidget currentChanged HC_DFCD_Protocol_V3_0
-\d (00:00:06) Design opened: D:/HC-PMP-SW/Power_ControlPannel/MP_Control_sw_405/MP_SW_Chrg/chrg/docs/HC_DFCD_Protocol_V3_0.brd
-\i (00:00:06) trapsize 8975
-\i (00:00:06) trapsize 9251
-\i (00:00:06) trapsize 9375
-\i (00:00:07) trapsize 8018
-\i (00:00:07) trapsize 8018
-\i (00:00:07) generaledit 
-\i (00:00:10) zoom out 1 
-\i (00:00:10) setwindow pcb
-\i (00:00:10) zoom out 138.1616 64.8823
-\i (00:00:10) trapsize 16037
-\i (00:00:10) zoom out 1 
-\i (00:00:10) setwindow pcb
-\i (00:00:10) zoom out 201.4873 63.2786
-\i (00:00:10) trapsize 32073
-\i (00:00:10) zoom out 1 
-\i (00:00:10) setwindow pcb
-\i (00:00:10) zoom out 502.3331 132.2094
-\i (00:00:10) trapsize 64146
-\i (00:00:11) zoom in 1 
-\i (00:00:11) setwindow pcb
-\i (00:00:11) zoom in -32.0050 32.1412
-\i (00:00:11) trapsize 32073
-\i (00:00:11) zoom in 1 
-\i (00:00:11) setwindow pcb
-\i (00:00:11) zoom in -32.0050 32.1412
-\i (00:00:11) trapsize 16037
-\i (00:00:11) zoom in 1 
-\i (00:00:11) setwindow pcb
-\i (00:00:11) zoom in -32.0049 32.1412
-\i (00:00:11) trapsize 8018
-\i (00:00:11) zoom in 1 
-\i (00:00:11) setwindow pcb
-\i (00:00:11) zoom in -32.8068 31.0187
-\i (00:00:11) trapsize 4009
-\i (00:00:11) zoom out 1 
-\i (00:00:11) setwindow pcb
-\i (00:00:11) zoom out 8.5676 58.6818
-\i (00:00:11) trapsize 8018
-\i (00:00:11) zoom out 1 
-\i (00:00:11) setwindow pcb
-\i (00:00:11) zoom out 8.4072 58.2007
-\i (00:00:11) trapsize 16037
-\i (00:00:11) zoom in 1 
-\i (00:00:11) setwindow pcb
-\i (00:00:11) zoom in 80.5716 56.2764
-\i (00:00:11) trapsize 8018
-\i (00:00:12) zoom out 1 
-\i (00:00:12) setwindow pcb
-\i (00:00:12) zoom out 26.5284 75.0392
-\i (00:00:12) trapsize 16037
-\i (00:00:13) zoom in 1 
-\i (00:00:13) setwindow pcb
-\i (00:00:13) zoom in 7.2846 90.8350
-\i (00:00:13) trapsize 8018
-\i (00:00:13) zoom in 1 
-\i (00:00:13) setwindow pcb
-\i (00:00:13) zoom in 7.2846 90.8350
-\i (00:00:13) trapsize 4009
-\i (00:00:14) zoom out 1 
-\i (00:00:14) setwindow pcb
-\i (00:00:14) zoom out 38.3956 49.0598
-\i (00:00:14) trapsize 8018
-\i (00:00:14) zoom in 1 
-\i (00:00:14) setwindow pcb
-\i (00:00:14) zoom in 38.3955 49.2202
-\i (00:00:14) trapsize 4009
-\i (00:00:14) zoom out 1 
-\i (00:00:14) setwindow pcb
-\i (00:00:14) zoom out 38.2352 49.3004
-\i (00:00:14) trapsize 8018
-\i (00:00:15) zoom in 1 
-\i (00:00:15) setwindow pcb
-\i (00:00:15) zoom in 44.3291 43.6876
-\i (00:00:15) trapsize 4009
-\i (00:00:15) zoom in 1 
-\i (00:00:15) setwindow pcb
-\i (00:00:15) zoom in 44.3291 43.6876
-\i (00:00:15) trapsize 2005
-\i (00:00:15) zoom out 1 
-\i (00:00:15) setwindow pcb
-\i (00:00:15) zoom out 41.4425 44.9305
-\i (00:00:15) trapsize 4009
-\i (00:00:16) zoom out 1 
-\i (00:00:16) setwindow pcb
-\i (00:00:16) zoom out 35.8297 45.3314
-\i (00:00:16) trapsize 8018
-\i (00:00:16) zoom out 1 
-\i (00:00:16) setwindow pcb
-\i (00:00:16) zoom out 33.7449 44.0484
-\i (00:00:16) trapsize 16037
-\i (00:00:16) zoom out 1 
-\i (00:00:16) setwindow pcb
-\i (00:00:16) zoom out 37.2732 25.7668
-\i (00:00:16) trapsize 32073
-\i (00:00:16) zoom out 1 
-\i (00:00:16) setwindow pcb
-\i (00:00:16) zoom out 173.2635 25.1253
-\i (00:00:16) trapsize 64146
-\i (00:00:16) zoom out 1 
-\i (00:00:16) setwindow pcb
-\i (00:00:16) zoom out 413.1708 40.5204
-\i (00:00:16) trapsize 128293
-\i (00:00:16) zoom out 1 
-\i (00:00:16) setwindow pcb
-\i (00:00:16) zoom out 859.6295 35.3887
-\i (00:00:16) trapsize 256585
-\i (00:00:17) zoom out 1 
-\i (00:00:17) setwindow pcb
-\i (00:00:17) zoom out 402.9074 158.5498
-\i (00:00:17) trapsize 513171
-\i (00:00:17) zoom out 1 
-\i (00:00:17) setwindow pcb
-\i (00:00:17) zoom out 895.5514 382.3806
-\i (00:00:17) trapsize 723589
-\i (00:00:17) zoom out 1 
-\i (00:00:17) setwindow pcb
-\i (00:00:17) zoom out 1303.7627 580.1737
-\i (00:00:17) trapsize 723589
-\i (00:00:18) zoom in 1 
-\i (00:00:18) setwindow pcb
-\i (00:00:18) zoom in 30.2460 -56.5847
-\i (00:00:18) trapsize 361795
-\i (00:00:18) zoom in 1 
-\i (00:00:18) setwindow pcb
-\i (00:00:18) zoom in 30.2460 -56.5846
-\i (00:00:18) trapsize 180897
-\i (00:00:18) zoom in 1 
-\i (00:00:18) setwindow pcb
-\i (00:00:18) zoom in 30.2460 -56.5846
-\i (00:00:18) trapsize 90449
-\i (00:00:18) zoom in 1 
-\i (00:00:18) setwindow pcb
-\i (00:00:18) zoom in 28.4371 -60.2025
-\i (00:00:18) trapsize 45224
-\i (00:00:18) zoom out 1 
-\i (00:00:18) setwindow pcb
-\i (00:00:18) zoom out 24.8191 -9.5513
-\i (00:00:18) trapsize 90449
-\i (00:00:18) zoom out 1 
-\i (00:00:18) setwindow pcb
-\i (00:00:18) zoom out 32.0551 1.3025
-\i (00:00:18) trapsize 180897
-\i (00:00:19) zoom out 1 
-\i (00:00:19) setwindow pcb
-\i (00:00:19) zoom out 17.5833 59.1896
-\i (00:00:19) trapsize 361795
-\i (00:00:19) zoom out 1 
-\i (00:00:19) setwindow pcb
-\i (00:00:19) zoom out 10.3474 211.1433
-\i (00:00:19) trapsize 723589
-\i (00:00:19) zoom in 1 
-\i (00:00:19) setwindow pcb
-\i (00:00:19) zoom in -13.1693 15.7742
-\i (00:00:19) trapsize 361795
-\i (00:00:20) zoom in 1 
-\i (00:00:20) setwindow pcb
-\i (00:00:20) zoom in -13.1693 15.7742
-\i (00:00:20) trapsize 180897
-\i (00:00:20) zoom in 1 
-\i (00:00:20) setwindow pcb
-\i (00:00:20) zoom in -13.1692 15.7743
-\i (00:00:20) trapsize 90449
+\t (00:00:02) allegro 17.2 S079 Windows SPB 64-bit Edition
+\t (00:00:02)     Journal start - Wed Aug 26 11:20:30 2026
+\t (00:00:02)         Host=DESKTOP-5RA9F3K User=Adminuser Pid=37292 CPUs=20
+\t (00:00:02) CmdLine= D:\Cadence\SPB_17.2\tools\bin\allegro.exe
+\t (00:00:02) 
+   (00:00:02) Loading axlcore.cxt 
+\t (00:00:03) Starting new design...
+\i (00:00:04) trapsize 29310
+\i (00:00:04) generaledit 
+\i (00:00:16) open 
+\i (00:00:19) fillin "HC_DFCD_Protocol_V3_0.brd"
+\i (00:00:19) trapsize 1230
+\i (00:00:19) QtSignal SPBFoldDockArea FoldAreaTabWidget currentChanged unnamed
+\t (00:00:19) Opening existing design...
+\i (00:00:20) trapsize 8018
+\d (00:00:20) Design opened: D:/HC-PMP-SW/Power_ControlPannel/MP_Control_sw_405/MP_SW_Chrg/chrg/docs/HC_DFCD_Protocol_V3_0.brd
+\i (00:00:20) generaledit 
+\i (00:00:21) zoom in 1 
+\i (00:00:21) setwindow pcb
+\i (00:00:21) zoom in 9.3881 57.0243
+\i (00:00:21) trapsize 4009
+\i (00:00:21) zoom in 1 
+\i (00:00:21) setwindow pcb
+\i (00:00:21) zoom in 9.3881 57.1046
+\i (00:00:21) trapsize 2005
 \i (00:00:21) zoom out 1 
 \i (00:00:21) setwindow pcb
-\i (00:00:21) zoom out 3.1116 1.3025
-\i (00:00:21) trapsize 180897
+\i (00:00:21) zoom out 11.3926 53.3761
+\i (00:00:21) trapsize 4009
 \i (00:00:21) zoom out 1 
 \i (00:00:21) setwindow pcb
-\i (00:00:21) zoom out 3.1116 15.7743
-\i (00:00:21) trapsize 361795
+\i (00:00:21) zoom out 11.3926 53.3762
+\i (00:00:21) trapsize 8018
 \i (00:00:21) zoom out 1 
 \i (00:00:21) setwindow pcb
-\i (00:00:21) zoom out 15.7742 15.7743
-\i (00:00:21) trapsize 723589
+\i (00:00:21) zoom out 11.3925 53.3762
+\i (00:00:21) trapsize 16037
 \i (00:00:22) zoom in 1 
 \i (00:00:22) setwindow pcb
-\i (00:00:22) zoom in 1.3025 -42.1129
-\i (00:00:22) trapsize 361795
+\i (00:00:22) zoom in -23.2465 36.3774
+\i (00:00:22) trapsize 8018
 \i (00:00:22) zoom in 1 
 \i (00:00:22) setwindow pcb
-\i (00:00:22) zoom in 1.3025 -42.1128
-\i (00:00:22) trapsize 180897
-\i (00:00:23) zoom in 1 
-\i (00:00:23) setwindow pcb
-\i (00:00:23) zoom in 1.3025 -24.0231
-\i (00:00:23) trapsize 90449
-\i (00:00:23) zoom in 1 
-\i (00:00:23) setwindow pcb
-\i (00:00:23) zoom in 1.3025 -24.0230
-\i (00:00:23) trapsize 45224
-\i (00:00:24) zoom in 1 
-\i (00:00:24) setwindow pcb
-\i (00:00:24) zoom in 4.0160 1.3026
-\i (00:00:24) trapsize 22612
-\i (00:00:24) zoom out 1 
-\i (00:00:24) setwindow pcb
-\i (00:00:24) zoom out 3.5638 28.4372
-\i (00:00:24) trapsize 45224
-\i (00:00:24) zoom out 1 
-\i (00:00:24) setwindow pcb
-\i (00:00:24) zoom out -1.8631 25.7237
-\i (00:00:24) trapsize 90449
-\i (00:00:25) zoom in 1 
-\i (00:00:25) setwindow pcb
-\i (00:00:25) zoom in -7.2901 53.7627
-\i (00:00:25) trapsize 45224
-\i (00:00:25) zoom in 1 
-\i (00:00:25) setwindow pcb
-\i (00:00:25) zoom in -2.7677 50.1448
-\i (00:00:25) trapsize 22612
-\i (00:00:25) zoom in 1 
-\i (00:00:25) setwindow pcb
-\i (00:00:25) zoom in -2.7677 50.1448
-\i (00:00:25) trapsize 11306
-\i (00:00:25) zoom in 1 
-\i (00:00:25) setwindow pcb
-\i (00:00:25) zoom in -2.7677 50.1448
-\i (00:00:25) trapsize 5653
+\i (00:00:22) zoom in 1.2895 29.4817
+\i (00:00:22) trapsize 4009
 \i (00:00:26) zoom out 1 
 \i (00:00:26) setwindow pcb
-\i (00:00:26) zoom out 25.1583 52.9713
-\i (00:00:26) trapsize 11306
+\i (00:00:26) zoom out 34.8060 21.2229
+\i (00:00:26) trapsize 8018
 \i (00:00:27) zoom out 1 
 \i (00:00:27) setwindow pcb
-\i (00:00:27) zoom out 13.8523 41.6653
-\i (00:00:27) trapsize 22612
+\i (00:00:27) zoom out 28.8724 21.5436
+\i (00:00:27) trapsize 16037
 \i (00:00:27) zoom out 1 
 \i (00:00:27) setwindow pcb
-\i (00:00:27) zoom out 12.9477 40.7608
-\i (00:00:27) trapsize 45224
-\i (00:00:27) zoom in 1 
+\i (00:00:27) zoom out -0.5732 30.8448
+\i (00:00:27) trapsize 32073
+\i (00:00:27) zoom out 1 
 \i (00:00:27) setwindow pcb
-\i (00:00:27) zoom in 19.3922 20.8622
-\i (00:00:27) trapsize 22612
+\i (00:00:27) zoom out 91.7976 36.6180
+\i (00:00:27) trapsize 64146
 \i (00:00:28) zoom in 1 
 \i (00:00:28) setwindow pcb
-\i (00:00:28) zoom in 22.5579 11.3651
-\i (00:00:28) trapsize 11306
+\i (00:00:28) zoom in -3.7805 8.3937
+\i (00:00:28) trapsize 32073
 \i (00:00:28) zoom in 1 
 \i (00:00:28) setwindow pcb
-\i (00:00:28) zoom in 22.5579 11.3651
-\i (00:00:28) trapsize 5653
+\i (00:00:28) zoom in -6.9878 8.3937
+\i (00:00:28) trapsize 16037
 \i (00:00:28) zoom in 1 
 \i (00:00:28) setwindow pcb
-\i (00:00:28) zoom in 22.5579 11.3652
-\i (00:00:28) trapsize 2827
-\i (00:00:29) zoom out 1 
+\i (00:00:28) zoom in -4.1012 1.0169
+\i (00:00:28) trapsize 8018
+\i (00:00:29) zoom in 1 
 \i (00:00:29) setwindow pcb
-\i (00:00:29) zoom out 29.3416 34.6558
-\i (00:00:29) trapsize 5653
+\i (00:00:29) zoom in -4.1012 1.0169
+\i (00:00:29) trapsize 4009
 \i (00:00:30) zoom in 1 
 \i (00:00:30) setwindow pcb
-\i (00:00:30) zoom in 27.5326 45.7357
-\i (00:00:30) trapsize 2827
+\i (00:00:30) zoom in 32.5425 24.1097
+\i (00:00:30) trapsize 2005
 \i (00:00:30) zoom in 1 
 \i (00:00:30) setwindow pcb
-\i (00:00:30) zoom in 28.4936 46.3576
-\i (00:00:30) trapsize 1413
-\i (00:00:31) zoom in 1 
-\i (00:00:31) setwindow pcb
-\i (00:00:31) zoom in 28.4937 45.3400
-\i (00:00:31) trapsize 707
-\i (00:00:31) zoom in 1 
-\i (00:00:31) setwindow pcb
-\i (00:00:31) zoom in 28.4654 45.2977
-\i (00:00:31) trapsize 353
-\i (00:00:31) zoom out 1 
-\i (00:00:31) setwindow pcb
-\i (00:00:31) zoom out 29.2992 45.4531
-\i (00:00:31) trapsize 707
-\i (00:00:32) zoom out 1 
-\i (00:00:32) setwindow pcb
-\i (00:00:32) zoom out 29.2993 45.4108
-\i (00:00:32) trapsize 1413
-\i (00:00:32) zoom in 1 
-\i (00:00:32) setwindow pcb
-\i (00:00:32) zoom in 30.0341 47.7003
-\i (00:00:32) trapsize 707
-\i (00:00:32) zoom in 1 
-\i (00:00:32) setwindow pcb
-\i (00:00:32) zoom in 30.0341 47.7003
-\i (00:00:32) trapsize 353
-\i (00:00:33) zoom out 1 
-\i (00:00:33) setwindow pcb
-\i (00:00:33) zoom out 29.7868 46.8523
-\i (00:00:33) trapsize 707
-\i (00:00:33) zoom out 1 
-\i (00:00:33) setwindow pcb
-\i (00:00:33) zoom out 29.7869 46.8524
-\i (00:00:33) trapsize 1413
-\i (00:00:33) zoom in 1 
-\i (00:00:33) setwindow pcb
-\i (00:00:33) zoom in 29.4194 39.9840
-\i (00:00:33) trapsize 707
-\i (00:00:33) zoom in 1 
-\i (00:00:33) setwindow pcb
-\i (00:00:33) zoom in 29.4336 40.3232
-\i (00:00:33) trapsize 353
-\i (00:00:34) zoom out 1 
-\i (00:00:34) setwindow pcb
-\i (00:00:34) zoom out 29.5396 40.5988
-\i (00:00:34) trapsize 707
-\i (00:00:34) zoom out 1 
-\i (00:00:34) setwindow pcb
-\i (00:00:34) zoom out 29.8506 42.9449
-\i (00:00:34) trapsize 1413
-\i (00:00:34) zoom out 1 
-\i (00:00:34) setwindow pcb
-\i (00:00:34) zoom out 29.8506 42.9448
-\i (00:00:34) trapsize 2827
-\i (00:00:35) zoom in 1 
-\i (00:00:35) setwindow pcb
-\i (00:00:35) zoom in 30.6985 48.5414
-\i (00:00:35) trapsize 1413
-\i (00:00:35) zoom in 1 
-\i (00:00:35) setwindow pcb
-\i (00:00:35) zoom in 30.6985 48.5414
-\i (00:00:35) trapsize 707
-\i (00:00:35) zoom in 1 
-\i (00:00:35) setwindow pcb
-\i (00:00:35) zoom in 30.1191 48.5697
-\i (00:00:35) trapsize 353
-\i (00:00:36) zoom out 1 
-\i (00:00:36) setwindow pcb
-\i (00:00:36) zoom out 29.5962 48.0963
-\i (00:00:36) trapsize 707
-\i (00:00:36) zoom in 1 
-\i (00:00:36) setwindow pcb
-\i (00:00:36) zoom in 29.6811 44.6762
-\i (00:00:36) trapsize 353
-\i (00:00:37) zoom in 1 
-\i (00:00:37) setwindow pcb
-\i (00:00:37) zoom in 29.8154 44.8741
-\i (00:00:37) trapsize 177
-\i (00:00:37) zoom out 1 
-\i (00:00:37) setwindow pcb
-\i (00:00:37) zoom out 29.8154 44.8918
-\i (00:00:37) trapsize 353
-\i (00:00:37) zoom out 1 
-\i (00:00:37) setwindow pcb
-\i (00:00:37) zoom out 29.8013 44.8918
-\i (00:00:37) trapsize 707
-\i (00:00:37) zoom out 1 
-\i (00:00:37) setwindow pcb
-\i (00:00:37) zoom out 29.6741 45.0756
-\i (00:00:37) trapsize 1413
-\i (00:00:37) zoom out 1 
-\i (00:00:37) setwindow pcb
-\i (00:00:37) zoom out 29.6740 45.0756
-\i (00:00:37) trapsize 2827
-\i (00:00:38) zoom out 1 
-\i (00:00:38) setwindow pcb
-\i (00:00:38) zoom out 29.6741 45.5278
-\i (00:00:38) trapsize 5653
-\i (00:00:38) zoom in 1 
-\i (00:00:38) setwindow pcb
-\i (00:00:38) zoom in 29.6741 45.5277
-\i (00:00:38) trapsize 2827
-\i (00:00:38) zoom in 1 
-\i (00:00:38) setwindow pcb
-\i (00:00:38) zoom in 29.6741 45.3016
-\i (00:00:38) trapsize 1413
-\i (00:00:38) zoom in 1 
-\i (00:00:38) setwindow pcb
-\i (00:00:38) zoom in 29.7024 45.6973
-\i (00:00:38) trapsize 707
-\i (00:00:39) zoom in 1 
-\i (00:00:39) setwindow pcb
-\i (00:00:39) zoom in 29.5187 45.9376
-\i (00:00:39) trapsize 353
-\i (00:00:39) zoom in 1 
-\i (00:00:39) setwindow pcb
-\i (00:00:39) zoom in 29.5328 45.9023
-\i (00:00:39) trapsize 177
-\i (00:00:39) zoom out 1 
-\i (00:00:39) setwindow pcb
-\i (00:00:39) zoom out 29.6671 45.7186
-\i (00:00:39) trapsize 353
-\i (00:00:40) zoom out 1 
-\i (00:00:40) setwindow pcb
-\i (00:00:40) zoom out 29.9426 44.7011
-\i (00:00:40) trapsize 707
-\i (00:00:41) zoom out 1 
-\i (00:00:41) setwindow pcb
-\i (00:00:41) zoom out 29.6317 43.7825
-\i (00:00:41) trapsize 1413
-\i (00:00:41) zoom out 1 
-\i (00:00:41) setwindow pcb
-\i (00:00:41) zoom out 30.3384 42.8214
-\i (00:00:41) trapsize 2827
-\i (00:00:41) zoom out 1 
-\i (00:00:41) setwindow pcb
-\i (00:00:41) zoom out 30.1688 42.7083
-\i (00:00:41) trapsize 5653
-\i (00:00:41) zoom out 1 
-\i (00:00:41) setwindow pcb
-\i (00:00:41) zoom out 30.1689 42.7083
-\i (00:00:41) trapsize 11306
-\i (00:00:42) zoom out 1 
-\i (00:00:42) setwindow pcb
-\i (00:00:42) zoom out 26.0987 42.4822
-\i (00:00:42) trapsize 22612
-\i (00:00:42) zoom out 1 
-\i (00:00:42) setwindow pcb
-\i (00:00:42) zoom out 54.2149 41.5778
-\i (00:00:42) trapsize 45224
-\i (00:00:42) zoom out 1 
-\i (00:00:42) setwindow pcb
-\i (00:00:42) zoom out 208.4298 45.1957
-\i (00:00:42) trapsize 90449
-\i (00:00:42) zoom in 1 
-\i (00:00:42) setwindow pcb
-\i (00:00:42) zoom in 10.3473 3.5893
-\i (00:00:42) trapsize 45224
-\i (00:00:42) zoom in 1 
-\i (00:00:42) setwindow pcb
-\i (00:00:42) zoom in 10.3474 3.5893
-\i (00:00:42) trapsize 22612
-\i (00:00:42) zoom in 1 
-\i (00:00:42) setwindow pcb
-\i (00:00:42) zoom in 10.3474 3.5893
-\i (00:00:42) trapsize 11306
-\i (00:00:43) zoom in 1 
-\i (00:00:43) setwindow pcb
-\i (00:00:43) zoom in 10.3474 3.5894
-\i (00:00:43) trapsize 5653
-\i (00:00:43) zoom in 1 
-\i (00:00:43) setwindow pcb
-\i (00:00:43) zoom in 10.3474 3.5894
-\i (00:00:43) trapsize 2827
-\i (00:00:44) zoom out 1 
-\i (00:00:44) setwindow pcb
-\i (00:00:44) zoom out 12.0434 18.1178
-\i (00:00:44) trapsize 5653
-\i (00:00:44) zoom out 1 
-\i (00:00:44) setwindow pcb
-\i (00:00:44) zoom out 12.0433 18.0046
-\i (00:00:44) trapsize 11306
-\i (00:00:44) zoom in 1 
-\i (00:00:44) setwindow pcb
-\i (00:00:44) zoom in 19.0531 53.5058
-\i (00:00:44) trapsize 5653
-\i (00:00:45) zoom in 1 
-\i (00:00:45) setwindow pcb
-\i (00:00:45) zoom in 27.1935 45.5915
-\i (00:00:45) trapsize 2827
-\i (00:00:45) zoom in 1 
-\i (00:00:45) setwindow pcb
-\i (00:00:45) zoom in 27.1935 45.5916
-\i (00:00:45) trapsize 1413
-\i (00:00:46) zoom in 1 
-\i (00:00:46) setwindow pcb
-\i (00:00:46) zoom in 28.7481 45.3089
-\i (00:00:46) trapsize 707
-\i (00:03:01) zoom out 1 
-\i (00:03:01) setwindow pcb
-\i (00:03:01) zoom out 30.9669 43.6271
-\i (00:03:01) trapsize 1413
-\i (00:03:01) zoom out 1 
-\i (00:03:01) setwindow pcb
-\i (00:03:01) zoom out 30.6561 43.0619
-\i (00:03:01) trapsize 2827
-\i (00:03:01) zoom out 1 
-\i (00:03:01) setwindow pcb
-\i (00:03:01) zoom out 30.0342 41.6486
-\i (00:03:01) trapsize 5653
-\i (00:03:02) zoom in 1 
-\i (00:03:02) setwindow pcb
-\i (00:03:02) zoom in 14.8840 27.2898
-\i (00:03:02) trapsize 2827
-\i (00:03:02) zoom in 1 
-\i (00:03:02) setwindow pcb
-\i (00:03:02) zoom in 14.8840 27.2898
-\i (00:03:02) trapsize 1413
-\i (00:03:03) zoom out 1 
-\i (00:03:03) setwindow pcb
-\i (00:03:03) zoom out 15.1667 26.6680
-\i (00:03:03) trapsize 2827
-\i (00:03:03) zoom out 1 
-\i (00:03:03) setwindow pcb
-\i (00:03:03) zoom out 17.1452 27.7987
-\i (00:03:03) trapsize 5653
-\i (00:03:03) zoom out 1 
-\i (00:03:03) setwindow pcb
-\i (00:03:03) zoom out 17.1451 27.7986
-\i (00:03:03) trapsize 11306
-\i (00:03:06) zoom in 1 
-\i (00:03:06) setwindow pcb
-\i (00:03:06) zoom in 15.3362 29.1554
-\i (00:03:06) trapsize 5653
-\i (00:03:06) zoom in 1 
-\i (00:03:06) setwindow pcb
-\i (00:03:06) zoom in 15.5624 28.4770
-\i (00:03:06) trapsize 2827
-\i (00:03:06) zoom in 1 
-\i (00:03:06) setwindow pcb
-\i (00:03:06) zoom in 18.1062 28.3075
-\i (00:03:06) trapsize 1413
-\i (00:03:06) zoom in 1 
-\i (00:03:06) setwindow pcb
-\i (00:03:06) zoom in 18.2476 28.4489
-\i (00:03:06) trapsize 707
-\i (00:03:07) zoom out 1 
-\i (00:03:07) setwindow pcb
-\i (00:03:07) zoom out 18.9684 29.2686
-\i (00:03:07) trapsize 1413
-\i (00:03:07) zoom out 1 
-\i (00:03:07) setwindow pcb
-\i (00:03:07) zoom out 18.9684 29.2686
-\i (00:03:07) trapsize 2827
-\i (00:03:07) zoom out 1 
-\i (00:03:07) setwindow pcb
-\i (00:03:07) zoom out 21.1731 31.2472
-\i (00:03:07) trapsize 5653
-\i (00:03:08) zoom in 1 
-\i (00:03:08) setwindow pcb
-\i (00:03:08) zoom in 22.6430 41.1966
-\i (00:03:08) trapsize 2827
-\i (00:03:08) zoom in 1 
-\i (00:03:08) setwindow pcb
-\i (00:03:08) zoom in 24.7347 41.9315
-\i (00:03:08) trapsize 1413
-\i (00:03:09) zoom in 1 
-\i (00:03:09) setwindow pcb
-\i (00:03:09) zoom in 26.5154 42.4403
-\i (00:03:09) trapsize 707
-\i (00:03:09) zoom in 1 
-\i (00:03:09) setwindow pcb
-\i (00:03:09) zoom in 28.7202 42.9632
-\i (00:03:09) trapsize 353
-\i (00:03:10) zoom in 1 
-\i (00:03:10) setwindow pcb
-\i (00:03:10) zoom in 29.7448 42.5816
-\i (00:03:10) trapsize 177
-\i (00:03:10) zoom out 1 
-\i (00:03:10) setwindow pcb
-\i (00:03:10) zoom out 29.7130 42.5569
-\i (00:03:10) trapsize 353
-\i (00:03:17) zoom in 1 
-\i (00:03:17) setwindow pcb
-\i (00:03:17) zoom in 29.8615 43.1151
-\i (00:03:17) trapsize 177
-\i (00:03:17) zoom in 1 
-\i (00:03:17) setwindow pcb
-\i (00:03:17) zoom in 29.8615 43.1151
-\i (00:03:17) trapsize 88
-\i (00:03:17) zoom in 1 
-\i (00:03:17) setwindow pcb
-\i (00:03:17) zoom in 29.8615 43.1151
-\i (00:03:17) trapsize 44
-\i (00:03:17) zoom in 1 
-\i (00:03:17) setwindow pcb
-\i (00:03:17) zoom in 29.8615 43.1151
-\i (00:03:17) trapsize 22
-\i (00:03:17) zoom out 1 
-\i (00:03:17) setwindow pcb
-\i (00:03:17) zoom out 29.8606 43.1151
-\i (00:03:17) trapsize 44
-\i (00:03:17) zoom out 1 
-\i (00:03:17) setwindow pcb
-\i (00:03:17) zoom out 29.8526 43.1151
-\i (00:03:17) trapsize 88
-\i (00:03:17) zoom out 1 
-\i (00:03:17) setwindow pcb
-\i (00:03:17) zoom out 29.8525 43.1151
-\i (00:03:17) trapsize 177
-\i (00:03:17) zoom in 1 
-\i (00:03:17) setwindow pcb
-\i (00:03:17) zoom in 29.8525 43.1151
-\i (00:03:17) trapsize 88
-\i (00:03:17) zoom out 1 
-\i (00:03:17) setwindow pcb
-\i (00:03:17) zoom out 29.8525 43.1151
-\i (00:03:17) trapsize 177
-\i (00:03:18) zoom out 1 
-\i (00:03:18) setwindow pcb
-\i (00:03:18) zoom out 29.5840 43.1469
-\i (00:03:18) trapsize 353
-\i (00:03:18) zoom out 1 
-\i (00:03:18) setwindow pcb
-\i (00:03:18) zoom out 29.5841 43.1468
-\i (00:03:18) trapsize 707
-\i (00:03:19) zoom out 1 
-\i (00:03:19) setwindow pcb
-\i (00:03:19) zoom out 29.5841 43.1468
-\i (00:03:19) trapsize 1413
-\i (00:03:19) zoom in 1 
-\i (00:03:19) setwindow pcb
-\i (00:03:19) zoom in 29.0188 48.5735
-\i (00:03:19) trapsize 707
-\i (00:03:20) zoom in 1 
-\i (00:03:20) setwindow pcb
-\i (00:03:20) zoom in 29.1036 48.5736
-\i (00:03:20) trapsize 353
-\i (00:03:20) zoom out 1 
-\i (00:03:20) setwindow pcb
-\i (00:03:20) zoom out 29.8244 48.1284
-\i (00:03:20) trapsize 707
-\i (00:03:20) zoom out 1 
-\i (00:03:20) setwindow pcb
-\i (00:03:20) zoom out 29.8102 48.1002
-\i (00:03:20) trapsize 1413
-\i (00:03:20) zoom out 1 
-\i (00:03:20) setwindow pcb
-\i (00:03:20) zoom out 29.7820 47.9871
-\i (00:03:20) trapsize 2826
-\i (00:03:20) zoom out 1 
-\i (00:03:20) setwindow pcb
-\i (00:03:20) zoom out 25.5425 39.1688
-\i (00:03:20) trapsize 5653
-\i (00:03:20) zoom out 1 
-\i (00:03:20) setwindow pcb
-\i (00:03:20) zoom out 25.5424 38.2643
-\i (00:03:20) trapsize 11306
-\i (00:03:21) zoom in 1 
-\i (00:03:21) setwindow pcb
-\i (00:03:21) zoom in 14.8648 24.0193
-\i (00:03:21) trapsize 5653
-\i (00:03:21) zoom in 1 
-\i (00:03:21) setwindow pcb
-\i (00:03:21) zoom in 14.8648 24.0193
-\i (00:03:21) trapsize 2826
-\i (00:03:22) zoom in 1 
-\i (00:03:22) setwindow pcb
-\i (00:03:22) zoom in 13.3385 30.3504
-\i (00:03:22) trapsize 1413
-\i (00:03:22) zoom in 1 
-\i (00:03:22) setwindow pcb
-\i (00:03:22) zoom in 13.5929 30.4918
-\i (00:03:22) trapsize 707
-\i (00:03:22) zoom out 1 
-\i (00:03:22) setwindow pcb
-\i (00:03:22) zoom out 14.0169 31.5235
-\i (00:03:22) trapsize 1413
-\i (00:03:22) zoom out 1 
-\i (00:03:22) setwindow pcb
-\i (00:03:22) zoom out 14.0170 31.4952
-\i (00:03:22) trapsize 2826
-\i (00:03:22) zoom out 1 
-\i (00:03:22) setwindow pcb
-\i (00:03:22) zoom out 14.1865 30.8734
-\i (00:03:22) trapsize 5653
-\i (00:03:22) zoom out 1 
-\i (00:03:22) setwindow pcb
-\i (00:03:22) zoom out 14.4126 30.5342
-\i (00:03:22) trapsize 11306
-\i (00:03:23) zoom in 1 
-\i (00:03:23) setwindow pcb
-\i (00:03:23) zoom in 19.3871 42.0659
-\i (00:03:23) trapsize 5653
-\i (00:03:23) zoom in 1 
-\i (00:03:23) setwindow pcb
-\i (00:03:23) zoom in 19.1610 41.3876
-\i (00:03:23) trapsize 2826
-\i (00:03:24) zoom in 1 
-\i (00:03:24) setwindow pcb
-\i (00:03:24) zoom in 19.7263 38.7308
-\i (00:03:24) trapsize 1413
-\i (00:03:29) zoom out 1 
-\i (00:03:29) setwindow pcb
-\i (00:03:29) zoom out 30.6079 43.8749
-\i (00:03:29) trapsize 2826
-\i (00:03:29) zoom out 1 
-\i (00:03:29) setwindow pcb
-\i (00:03:29) zoom out 30.6079 43.8749
-\i (00:03:29) trapsize 5653
-\i (00:03:30) zoom in 1 
-\i (00:03:30) setwindow pcb
-\i (00:03:30) zoom in 34.5649 51.5628
-\i (00:03:30) trapsize 2826
-\i (00:03:30) zoom in 1 
-\i (00:03:30) setwindow pcb
-\i (00:03:30) zoom in 34.5649 51.5628
-\i (00:03:30) trapsize 1413
-\i (00:03:31) zoom in 1 
-\i (00:03:31) setwindow pcb
-\i (00:03:31) zoom in 30.4949 47.8885
-\i (00:03:31) trapsize 707
-\i (00:03:31) zoom in 1 
-\i (00:03:31) setwindow pcb
-\i (00:03:31) zoom in 30.1699 47.6342
-\i (00:03:31) trapsize 353
-\i (00:03:31) zoom in 1 
-\i (00:03:31) setwindow pcb
-\i (00:03:31) zoom in 30.1699 47.6342
-\i (00:03:31) trapsize 177
-\i (00:03:32) zoom out 1 
-\i (00:03:32) setwindow pcb
-\i (00:03:32) zoom out 30.1593 47.5812
-\i (00:03:32) trapsize 353
-\i (00:03:32) zoom out 1 
-\i (00:03:32) setwindow pcb
-\i (00:03:32) zoom out 30.1523 47.5600
-\i (00:03:32) trapsize 707
-\i (00:04:44) zoom out 1 
-\i (00:04:44) setwindow pcb
-\i (00:04:44) zoom out 24.4713 44.8467
-\i (00:04:44) trapsize 1413
-\i (00:04:45) zoom out 1 
-\i (00:04:45) setwindow pcb
-\i (00:04:45) zoom out 24.1886 45.2141
-\i (00:04:45) trapsize 2826
-\i (00:04:45) zoom out 1 
-\i (00:04:45) setwindow pcb
-\i (00:04:45) zoom out 24.1320 45.2141
-\i (00:04:45) trapsize 5653
-\i (00:04:45) zoom in 1 
-\i (00:04:45) setwindow pcb
-\i (00:04:45) zoom in 19.3836 42.7268
-\i (00:04:45) trapsize 2826
-\i (00:04:46) zoom in 1 
-\i (00:04:46) setwindow pcb
-\i (00:04:46) zoom in 19.2706 41.4267
-\i (00:04:46) trapsize 1413
-\i (00:04:46) zoom in 1 
-\i (00:04:46) setwindow pcb
-\i (00:04:46) zoom in 33.0634 45.1858
-\i (00:04:46) trapsize 707
-\i (00:04:47) zoom in 1 
-\i (00:04:47) setwindow pcb
-\i (00:04:47) zoom in 33.0634 45.1858
-\i (00:04:47) trapsize 353
-\i (00:04:47) zoom out 1 
-\i (00:04:47) setwindow pcb
-\i (00:04:47) zoom out 31.0920 45.7581
-\i (00:04:47) trapsize 707
-\i (00:04:47) zoom out 1 
-\i (00:04:47) setwindow pcb
-\i (00:04:47) zoom out 31.0921 45.7582
-\i (00:04:47) trapsize 1413
-\i (00:04:48) zoom in 1 
-\i (00:04:48) setwindow pcb
-\i (00:04:48) zoom in 28.0678 48.5563
-\i (00:04:48) trapsize 707
-\i (00:04:48) zoom in 1 
-\i (00:04:48) setwindow pcb
-\i (00:04:48) zoom in 27.3047 48.6694
-\i (00:04:48) trapsize 353
-\i (00:06:16) zoom out 1 
-\i (00:06:16) setwindow pcb
-\i (00:06:16) zoom out 29.7001 47.4399
-\i (00:06:16) trapsize 707
-\i (00:06:16) zoom in 1 
-\i (00:06:16) setwindow pcb
-\i (00:06:16) zoom in 29.7001 47.4400
-\i (00:06:16) trapsize 353
-\i (00:06:16) zoom out 1 
-\i (00:06:16) setwindow pcb
-\i (00:06:16) zoom out 29.7001 47.4400
-\i (00:06:16) trapsize 707
-\i (00:06:16) zoom out 1 
-\i (00:06:16) setwindow pcb
-\i (00:06:16) zoom out 29.7001 47.4401
-\i (00:06:16) trapsize 1413
-\i (00:06:16) zoom in 1 
-\i (00:06:16) setwindow pcb
-\i (00:06:16) zoom in 27.1845 45.6029
-\i (00:06:16) trapsize 707
-\i (00:06:16) zoom in 1 
-\i (00:06:16) setwindow pcb
-\i (00:06:16) zoom in 27.4248 45.7018
-\i (00:06:16) trapsize 353
-\i (00:06:16) zoom in 1 
-\i (00:06:16) setwindow pcb
-\i (00:06:16) zoom in 27.5803 45.9774
-\i (00:06:16) trapsize 177
-\i (00:06:17) zoom out 1 
-\i (00:06:17) setwindow pcb
-\i (00:06:17) zoom out 28.9829 45.9774
-\i (00:06:17) trapsize 353
-\i (00:06:17) zoom out 1 
-\i (00:06:17) setwindow pcb
-\i (00:06:17) zoom out 28.9971 45.9775
-\i (00:06:17) trapsize 707
-\i (00:06:17) zoom in 1 
-\i (00:06:17) setwindow pcb
-\i (00:06:17) zoom in 30.6506 47.9277
-\i (00:06:17) trapsize 353
-\i (00:06:17) zoom in 1 
-\i (00:06:17) setwindow pcb
-\i (00:06:17) zoom in 30.6506 47.9347
-\i (00:06:17) trapsize 177
-\i (00:06:18) zoom out 1 
-\i (00:06:18) setwindow pcb
-\i (00:06:18) zoom out 30.1596 48.0372
-\i (00:06:18) trapsize 353
+\i (00:00:30) zoom in 32.8232 23.3480
+\i (00:00:30) trapsize 1002
+\i (00:00:30) zoom in 1 
+\i (00:00:30) setwindow pcb
+\i (00:00:30) zoom in 33.2241 22.9672
+\i (00:00:30) trapsize 501
+\i (00:01:29) zoom out 1 
+\i (00:01:29) setwindow pcb
+\i (00:01:29) zoom out 31.5303 24.9216
+\i (00:01:29) trapsize 1002
+\i (00:01:30) zoom out 1 
+\i (00:01:30) setwindow pcb
+\i (00:01:30) zoom out 30.3075 24.9016
+\i (00:01:30) trapsize 2005
+\i (00:01:30) zoom out 1 
+\i (00:01:30) setwindow pcb
+\i (00:01:30) zoom out 29.9467 24.7012
+\i (00:01:30) trapsize 4009
+\i (00:01:30) zoom out 1 
+\i (00:01:30) setwindow pcb
+\i (00:01:30) zoom out 29.7062 24.6211
+\i (00:01:30) trapsize 8018
+\i (00:01:30) zoom out 1 
+\i (00:01:30) setwindow pcb
+\i (00:01:30) zoom out 28.4233 35.8467
+\i (00:01:30) trapsize 16037
+\i (00:01:30) zoom out 1 
+\i (00:01:30) setwindow pcb
+\i (00:01:30) zoom out 28.1026 71.2708
+\i (00:01:30) trapsize 32073
+\i (00:01:30) zoom out 1 
+\i (00:01:30) setwindow pcb
+\i (00:01:30) zoom out 98.2122 245.1074
+\i (00:01:30) trapsize 64146
+\i (00:01:30) zoom out 1 
+\i (00:01:30) setwindow pcb
+\i (00:01:30) zoom out 296.4245 590.2147
+\i (00:01:30) trapsize 128293
+\i (00:01:31) zoom in 1 
+\i (00:01:31) setwindow pcb
+\i (00:01:31) zoom in -97.4341 64.2147
+\i (00:01:31) trapsize 64146
+\i (00:01:31) zoom in 1 
+\i (00:01:31) setwindow pcb
+\i (00:01:31) zoom in -97.4341 64.2147
+\i (00:01:31) trapsize 32073
+\i (00:01:31) zoom in 1 
+\i (00:01:31) setwindow pcb
+\i (00:01:31) zoom in -97.4340 64.8562
+\i (00:01:31) trapsize 16037
+\i (00:01:31) zoom in 1 
+\i (00:01:31) setwindow pcb
+\i (00:01:31) zoom in -78.5108 74.7989
+\i (00:01:31) trapsize 8018
+\i (00:01:32) zoom in 1 
+\i (00:01:32) setwindow pcb
+\i (00:01:32) zoom in 38.0752 90.8355
+\i (00:01:32) trapsize 4009
+\i (00:01:32) zoom in 1 
+\i (00:01:32) setwindow pcb
+\i (00:01:32) zoom in 36.0707 90.8356
+\i (00:01:32) trapsize 2005
+\i (00:01:32) zoom in 1 
+\i (00:01:32) setwindow pcb
+\i (00:01:32) zoom in 30.8187 90.1942
+\i (00:01:32) trapsize 1002
+\i (00:01:33) zoom in 1 
+\i (00:01:33) setwindow pcb
+\i (00:01:33) zoom in 21.8583 91.4170
+\i (00:01:33) trapsize 501
+\i (00:01:33) zoom out 1 
+\i (00:01:33) setwindow pcb
+\i (00:01:33) zoom out 21.9585 91.5072
+\i (00:01:33) trapsize 1002
+\i (00:01:34) zoom in 1 
+\i (00:01:34) setwindow pcb
+\i (00:01:34) zoom in 18.3102 91.2667
+\i (00:01:34) trapsize 501
+\i (00:01:35) zoom out 1 
+\i (00:01:35) setwindow pcb
+\i (00:01:35) zoom out 18.3403 91.3670
+\i (00:01:35) trapsize 1002
+\i (00:01:35) zoom out 1 
+\i (00:01:35) setwindow pcb
+\i (00:01:35) zoom out 18.3604 91.2667
+\i (00:01:35) trapsize 2005
+\i (00:01:35) zoom out 1 
+\i (00:01:35) setwindow pcb
+\i (00:01:35) zoom out 18.2803 90.5050
+\i (00:01:35) trapsize 4009
+\i (00:01:35) zoom out 1 
+\i (00:01:35) setwindow pcb
+\i (00:01:35) zoom out 18.2803 90.1842
+\i (00:01:35) trapsize 8018
+\i (00:01:36) zoom out 1 
+\i (00:01:36) setwindow pcb
+\i (00:01:36) zoom out 19.2424 88.9014
+\i (00:01:36) trapsize 16037
+\i (00:01:36) zoom out 1 
+\i (00:01:36) setwindow pcb
+\i (00:01:36) zoom out 19.2424 88.5806
+\i (00:01:36) trapsize 32073
+\i (00:01:36) zoom out 1 
+\i (00:01:36) setwindow pcb
+\i (00:01:36) zoom out 19.2425 60.9977
+\i (00:01:36) trapsize 64146
+\i (00:01:37) zoom out 1 
+\i (00:01:37) setwindow pcb
+\i (00:01:37) zoom out 17.9595 115.5317
+\i (00:01:37) trapsize 128293
+\i (00:01:37) zoom out 1 
+\i (00:01:37) setwindow pcb
+\i (00:01:37) zoom out 17.9595 323.3659
+\i (00:01:37) trapsize 256585
+\i (00:01:37) zoom in 1 
+\i (00:01:37) setwindow pcb
+\i (00:01:37) zoom in -79.5429 23.1610
+\i (00:01:37) trapsize 128293
+\i (00:01:37) zoom in 1 
+\i (00:01:37) setwindow pcb
+\i (00:01:37) zoom in -79.5429 23.1610
+\i (00:01:37) trapsize 64146
+\i (00:01:37) zoom in 1 
+\i (00:01:37) setwindow pcb
+\i (00:01:37) zoom in -79.5429 23.1610
+\i (00:01:37) trapsize 32073
+\i (00:01:37) zoom in 1 
+\i (00:01:37) setwindow pcb
+\i (00:01:37) zoom in -76.9770 37.2732
+\i (00:01:37) trapsize 16037
+\i (00:01:37) zoom in 1 
+\i (00:01:37) setwindow pcb
+\i (00:01:37) zoom in -75.0526 41.7635
+\i (00:01:37) trapsize 8018
+\i (00:01:38) zoom in 1 
+\i (00:01:38) setwindow pcb
+\i (00:01:38) zoom in -3.0483 90.8355
+\i (00:01:38) trapsize 4009
+\i (00:01:38) zoom in 1 
+\i (00:01:38) setwindow pcb
+\i (00:01:38) zoom in -0.7229 92.4392
+\i (00:01:38) trapsize 2005
+\i (00:01:39) zoom in 1 
+\i (00:01:39) setwindow pcb
+\i (00:01:39) zoom in 22.9712 93.2811
+\i (00:01:39) trapsize 1002
+\i (00:01:39) zoom in 1 
+\i (00:01:39) setwindow pcb
+\i (00:01:39) zoom in 22.9712 93.2811
+\i (00:01:39) trapsize 501
+\i (00:01:54) zoom out 1 
+\i (00:01:54) setwindow pcb
+\i (00:01:54) zoom out 19.1125 92.5294
+\i (00:01:54) trapsize 1002
+\i (00:07:02) zoom in 1 
+\i (00:07:02) setwindow pcb
+\i (00:07:02) zoom in 18.4710 93.8724
+\i (00:07:02) trapsize 501
+\i (00:07:04) zoom out 1 
+\i (00:07:04) setwindow pcb
+\i (00:07:04) zoom out 19.5334 91.9480
+\i (00:07:04) trapsize 1002
+\i (00:07:09) zoom in 1 
+\i (00:07:09) setwindow pcb
+\i (00:07:09) zoom in 18.4911 91.9882
+\i (00:07:09) trapsize 501
+\i (00:07:10) zoom out 1 
+\i (00:07:10) setwindow pcb
+\i (00:07:10) zoom out 19.2128 91.7075
+\i (00:07:10) trapsize 1002
+\i (00:07:25) zoom out 1 
+\i (00:07:25) setwindow pcb
+\i (00:07:25) zoom out 18.4110 90.8857
+\i (00:07:25) trapsize 2005
+\i (00:07:25) zoom in 1 
+\i (00:07:25) setwindow pcb
+\i (00:07:25) zoom in 19.7340 89.8032
+\i (00:07:25) trapsize 1002
+\i (00:07:25) zoom in 1 
+\i (00:07:25) setwindow pcb
+\i (00:07:25) zoom in 20.3755 89.3422
+\i (00:07:25) trapsize 501
+\i (00:07:29) drag_start grid 20.6361 90.3947
+\i (00:07:29) drag_stop 20.6361 90.5751
+\i (00:07:51) zoom out 1 
+\i (00:07:51) setwindow pcb
+\i (00:07:51) zoom out 21.4980 90.2343
+\i (00:07:51) trapsize 1002
 \i (00:07:57) zoom out 1 
 \i (00:07:57) setwindow pcb
-\i (00:07:57) zoom out 26.9728 45.2108
-\i (00:07:57) trapsize 707
+\i (00:07:57) zoom out 26.5496 91.6375
+\i (00:07:57) trapsize 2005
 \i (00:07:57) zoom out 1 
 \i (00:07:57) setwindow pcb
-\i (00:07:57) zoom out 26.9728 45.2107
-\i (00:07:57) trapsize 1413
-\i (00:11:49) zoom out 1 
-\i (00:11:49) setwindow pcb
-\i (00:11:49) zoom out 18.6067 51.6549
-\i (00:11:49) trapsize 2826
-\i (00:11:49) zoom in 1 
-\i (00:11:49) setwindow pcb
-\i (00:11:49) zoom in 18.1544 50.8071
-\i (00:11:49) trapsize 1413
-\i (00:11:49) zoom out 1 
-\i (00:11:49) setwindow pcb
-\i (00:11:49) zoom out 18.1545 50.8071
-\i (00:11:49) trapsize 2826
-\i (00:11:49) zoom out 1 
-\i (00:11:49) setwindow pcb
-\i (00:11:49) zoom out 18.0979 50.6375
-\i (00:11:49) trapsize 5653
-\i (00:11:49) zoom out 1 
-\i (00:11:49) setwindow pcb
-\i (00:11:49) zoom out 17.5326 52.4464
-\i (00:11:49) trapsize 11306
-\i (00:11:50) zoom in 1 
-\i (00:11:50) setwindow pcb
-\i (00:11:50) zoom in -8.6964 92.6943
-\i (00:11:50) trapsize 5653
-\i (00:11:50) zoom in 1 
-\i (00:11:50) setwindow pcb
-\i (00:11:50) zoom in -9.4878 93.4857
-\i (00:11:50) trapsize 2826
-\i (00:11:50) zoom in 1 
-\i (00:11:50) setwindow pcb
-\i (00:11:50) zoom in -9.6008 93.5988
-\i (00:11:50) trapsize 1413
-\i (00:11:50) zoom out 1 
-\i (00:11:50) setwindow pcb
-\i (00:11:50) zoom out 5.9161 87.2394
-\i (00:11:50) trapsize 2826
-\i (00:11:50) zoom out 1 
-\i (00:11:50) setwindow pcb
-\i (00:11:50) zoom out 5.9726 86.9002
-\i (00:11:50) trapsize 5653
-\i (00:11:51) zoom in 1 
-\i (00:11:51) setwindow pcb
-\i (00:11:51) zoom in 13.9996 86.7872
-\i (00:11:51) trapsize 2826
-\i (00:11:51) zoom in 1 
-\i (00:11:51) setwindow pcb
-\i (00:11:51) zoom in 14.3388 87.6916
-\i (00:11:51) trapsize 1413
-\i (00:11:51) zoom in 1 
-\i (00:11:51) setwindow pcb
-\i (00:11:51) zoom in 13.7170 87.9178
-\i (00:11:51) trapsize 707
-\i (00:11:51) zoom out 1 
-\i (00:11:51) setwindow pcb
-\i (00:11:51) zoom out 8.3328 90.2778
-\i (00:11:51) trapsize 1413
-\i (00:11:52) zoom out 1 
-\i (00:11:52) setwindow pcb
-\i (00:11:52) zoom out 8.3610 90.2496
-\i (00:11:52) trapsize 2826
-\i (00:11:52) zoom in 1 
-\i (00:11:52) setwindow pcb
-\i (00:11:52) zoom in 8.1914 95.0545
-\i (00:11:52) trapsize 1413
-\i (00:11:52) zoom in 1 
-\i (00:11:52) setwindow pcb
-\i (00:11:52) zoom in 7.9653 94.7719
-\i (00:11:52) trapsize 707
-\i (00:11:52) zoom in 1 
-\i (00:11:52) setwindow pcb
-\i (00:11:52) zoom in 8.3893 94.1360
-\i (00:11:52) trapsize 353
-\i (00:11:53) zoom in 1 
-\i (00:11:53) setwindow pcb
-\i (00:11:53) zoom in 9.9862 92.0304
-\i (00:11:53) trapsize 177
-\i (00:11:53) zoom out 1 
-\i (00:11:53) setwindow pcb
-\i (00:11:53) zoom out 9.5906 92.0374
-\i (00:11:53) trapsize 353
-\i (00:11:53) zoom out 1 
-\i (00:11:53) setwindow pcb
-\i (00:11:53) zoom out 9.5905 91.9951
-\i (00:11:53) trapsize 707
-\i (00:11:54) zoom in 1 
-\i (00:11:54) setwindow pcb
-\i (00:11:54) zoom in 9.8167 89.5220
-\i (00:11:54) trapsize 353
-\i (00:11:54) zoom in 1 
-\i (00:11:54) setwindow pcb
-\i (00:11:54) zoom in 9.8167 89.4161
-\i (00:11:54) trapsize 177
-\i (00:11:55) zoom out 1 
-\i (00:11:55) setwindow pcb
-\i (00:11:55) zoom out 9.6436 89.6210
-\i (00:11:55) trapsize 353
-\i (00:12:04) zoom out 1 
-\i (00:12:04) setwindow pcb
-\i (00:12:04) zoom out 9.8979 91.1402
-\i (00:12:04) trapsize 707
-\i (00:12:04) zoom out 1 
-\i (00:12:04) setwindow pcb
-\i (00:12:04) zoom out 9.8838 91.1402
-\i (00:12:04) trapsize 1413
-\i (00:12:04) zoom out 1 
-\i (00:12:04) setwindow pcb
-\i (00:12:04) zoom out 9.8838 91.1401
-\i (00:12:04) trapsize 2826
-\i (00:12:05) zoom out 1 
-\i (00:12:05) setwindow pcb
-\i (00:12:05) zoom out 10.8448 79.7215
-\i (00:12:05) trapsize 5653
-\i (00:12:05) zoom out 1 
-\i (00:12:05) setwindow pcb
-\i (00:12:05) zoom out 11.2970 79.4953
-\i (00:12:05) trapsize 11306
-\i (00:12:05) zoom in 1 
-\i (00:12:05) setwindow pcb
-\i (00:12:05) zoom in 5.8204 58.9192
-\i (00:12:05) trapsize 5653
-\i (00:12:06) zoom in 1 
-\i (00:12:06) setwindow pcb
-\i (00:12:06) zoom in 3.8984 65.3634
-\i (00:12:06) trapsize 2826
-\i (00:12:06) zoom in 1 
-\i (00:12:06) setwindow pcb
-\i (00:12:06) zoom in 8.1380 67.3419
-\i (00:12:06) trapsize 1413
-\i (00:12:07) zoom in 1 
-\i (00:12:07) setwindow pcb
-\i (00:12:07) zoom in 12.1798 69.3769
-\i (00:12:07) trapsize 707
-\i (00:12:07) zoom in 1 
-\i (00:12:07) setwindow pcb
-\i (00:12:07) zoom in 12.0667 71.0587
-\i (00:12:07) trapsize 353
-\i (00:12:57) zoom out 1 
-\i (00:12:57) setwindow pcb
-\i (00:12:57) zoom out 10.7948 71.5745
-\i (00:12:57) trapsize 707
-\i (00:12:57) zoom out 1 
-\i (00:12:57) setwindow pcb
-\i (00:12:57) zoom out 10.3851 71.3060
-\i (00:12:57) trapsize 1413
-\i (00:12:57) zoom out 1 
-\i (00:12:57) setwindow pcb
-\i (00:12:57) zoom out 9.9611 71.1081
-\i (00:12:57) trapsize 2826
-\i (00:12:58) zoom in 1 
-\i (00:12:58) setwindow pcb
-\i (00:12:58) zoom in 1.8210 67.8296
-\i (00:12:58) trapsize 1413
-\i (00:12:58) zoom in 1 
-\i (00:12:58) setwindow pcb
-\i (00:12:58) zoom in 1.7363 67.6600
-\i (00:12:58) trapsize 707
-\i (00:12:58) zoom in 1 
-\i (00:12:58) setwindow pcb
-\i (00:12:58) zoom in 1.8352 68.8188
-\i (00:12:58) trapsize 353
-\i (00:12:58) zoom in 1 
-\i (00:12:58) setwindow pcb
-\i (00:12:58) zoom in 1.8352 68.8189
-\i (00:12:58) trapsize 177
-\i (00:12:59) zoom out 1 
-\i (00:12:59) setwindow pcb
-\i (00:12:59) zoom out 2.6442 69.4195
-\i (00:12:59) trapsize 353
-\i (00:12:59) zoom out 1 
-\i (00:12:59) setwindow pcb
-\i (00:12:59) zoom out 2.6372 69.4054
-\i (00:12:59) trapsize 707
-\i (00:12:59) zoom out 1 
-\i (00:12:59) setwindow pcb
-\i (00:12:59) zoom out 3.3015 69.1794
-\i (00:12:59) trapsize 1413
-\i (00:12:59) zoom out 1 
-\i (00:12:59) setwindow pcb
-\i (00:12:59) zoom out 3.6407 68.3315
-\i (00:12:59) trapsize 2826
-\i (00:12:59) zoom out 1 
-\i (00:12:59) setwindow pcb
-\i (00:12:59) zoom out 3.6406 68.3315
-\i (00:12:59) trapsize 5653
-\i (00:13:00) zoom out 1 
-\i (00:13:00) setwindow pcb
-\i (00:13:00) zoom out 16.5290 88.2293
-\i (00:13:00) trapsize 11306
-\i (00:13:00) zoom in 1 
-\i (00:13:00) setwindow pcb
-\i (00:13:00) zoom in 57.1478 77.3761
-\i (00:13:00) trapsize 5653
-\i (00:13:00) zoom in 1 
-\i (00:13:00) setwindow pcb
-\i (00:13:00) zoom in 56.5825 75.4541
-\i (00:13:00) trapsize 2826
-\i (00:13:00) zoom in 1 
-\i (00:13:00) setwindow pcb
-\i (00:13:00) zoom in 56.2998 75.3410
-\i (00:13:00) trapsize 1413
-\i (00:13:00) zoom out 1 
-\i (00:13:00) setwindow pcb
-\i (00:13:00) zoom out 44.2876 74.6627
-\i (00:13:00) trapsize 2826
-\i (00:13:00) zoom out 1 
-\i (00:13:00) setwindow pcb
-\i (00:13:00) zoom out 44.2877 74.6628
-\i (00:13:00) trapsize 5653
-\i (00:13:00) zoom out 1 
-\i (00:13:00) setwindow pcb
-\i (00:13:00) zoom out 44.5137 73.5322
-\i (00:13:00) trapsize 11306
-\i (00:13:01) zoom in 1 
-\i (00:13:01) setwindow pcb
-\i (00:13:01) zoom in 3.3614 84.6117
-\i (00:13:01) trapsize 5653
-\i (00:13:01) zoom in 1 
-\i (00:13:01) setwindow pcb
-\i (00:13:01) zoom in 3.2483 84.6117
-\i (00:13:01) trapsize 2826
-\i (00:13:01) zoom in 1 
-\i (00:13:01) setwindow pcb
-\i (00:13:01) zoom in 3.1918 84.6118
-\i (00:13:01) trapsize 1413
-\i (00:13:02) zoom in 1 
-\i (00:13:02) setwindow pcb
-\i (00:13:02) zoom in 10.3143 72.6279
-\i (00:13:02) trapsize 707
-\i (00:13:02) zoom in 1 
-\i (00:13:02) setwindow pcb
-\i (00:13:02) zoom in 10.2720 72.2464
-\i (00:13:02) trapsize 353
-\i (00:13:03) zoom out 1 
-\i (00:13:03) setwindow pcb
-\i (00:13:03) zoom out 12.8722 72.1263
-\i (00:13:03) trapsize 707
-\i (00:13:06) zoom out 1 
-\i (00:13:06) setwindow pcb
-\i (00:13:06) zoom out 11.2613 74.0766
-\i (00:13:06) trapsize 1413
-\i (00:13:06) zoom out 1 
-\i (00:13:06) setwindow pcb
-\i (00:13:06) zoom out 9.4806 73.7374
-\i (00:13:06) trapsize 2826
-\i (00:13:06) zoom out 1 
-\i (00:13:06) setwindow pcb
-\i (00:13:06) zoom out 8.8589 73.5677
-\i (00:13:06) trapsize 5653
-\i (00:13:06) zoom out 1 
-\i (00:13:06) setwindow pcb
-\i (00:13:06) zoom out 6.5977 72.7764
-\i (00:13:06) trapsize 11306
-\i (00:13:07) zoom in 1 
-\i (00:13:07) setwindow pcb
-\i (00:13:07) zoom in -9.7814 89.2825
-\i (00:13:08) trapsize 5653
-\i (00:13:08) zoom in 1 
-\i (00:13:08) setwindow pcb
-\i (00:13:08) zoom in 9.6642 89.9609
-\i (00:13:08) trapsize 2826
-\i (00:13:08) zoom in 1 
-\i (00:13:08) setwindow pcb
-\i (00:13:08) zoom in 9.3251 89.2826
-\i (00:13:08) trapsize 1413
-\i (00:13:09) zoom in 1 
-\i (00:13:09) setwindow pcb
-\i (00:13:09) zoom in 11.5863 92.5895
-\i (00:13:09) trapsize 707
-\i (00:13:11) zoom in 1 
-\i (00:13:11) setwindow pcb
-\i (00:13:11) zoom in 10.4416 91.7558
-\i (00:13:11) trapsize 353
-\i (00:13:12) zoom out 1 
-\i (00:13:12) setwindow pcb
-\i (00:13:12) zoom out 9.7703 91.2188
-\i (00:13:12) trapsize 707
-\i (00:13:12) zoom out 1 
-\i (00:13:12) setwindow pcb
-\i (00:13:12) zoom out 9.7704 91.2188
-\i (00:13:12) trapsize 1413
-\i (00:13:16) zoom out 1 
-\i (00:13:16) setwindow pcb
-\i (00:13:16) zoom out 20.3411 87.6859
-\i (00:13:16) trapsize 2826
-\i (00:13:16) zoom out 1 
-\i (00:13:16) setwindow pcb
-\i (00:13:16) zoom out 20.5673 87.4597
-\i (00:13:16) trapsize 5653
-\i (00:13:16) zoom out 1 
-\i (00:13:16) setwindow pcb
-\i (00:13:16) zoom out 28.8203 77.8499
-\i (00:13:16) trapsize 11306
-\i (00:13:16) zoom out 1 
-\i (00:13:16) setwindow pcb
-\i (00:13:16) zoom out 108.0229 77.8500
-\i (00:13:16) trapsize 22611
-\i (00:13:17) zoom in 1 
-\i (00:13:17) setwindow pcb
-\i (00:13:17) zoom in 38.3805 37.1498
-\i (00:13:17) trapsize 11306
-\i (00:13:17) zoom in 1 
-\i (00:13:17) setwindow pcb
-\i (00:13:17) zoom in 38.1544 37.1498
-\i (00:13:17) trapsize 5653
-\i (00:13:19) zoom out 1 
-\i (00:13:19) setwindow pcb
-\i (00:13:19) zoom out 40.1895 53.5429
-\i (00:13:19) trapsize 11306
-\i (00:13:20) zoom in 1 
-\i (00:13:20) setwindow pcb
-\i (00:13:20) zoom in 25.2660 68.4663
-\i (00:13:20) trapsize 5653
-\i (00:13:20) zoom out 1 
-\i (00:13:20) setwindow pcb
-\i (00:13:20) zoom out 11.0209 73.6669
-\i (00:13:20) trapsize 11306
-\i (00:13:22) zoom in 1 
-\i (00:13:22) setwindow pcb
-\i (00:13:22) zoom in -14.7559 94.9214
-\i (00:13:22) trapsize 5653
-\i (00:13:22) zoom in 1 
-\i (00:13:22) setwindow pcb
-\i (00:13:22) zoom in -14.7558 94.8084
-\i (00:13:22) trapsize 2826
-\i (00:13:22) zoom in 1 
-\i (00:13:22) setwindow pcb
-\i (00:13:22) zoom in -14.7558 94.8084
-\i (00:13:22) trapsize 1413
-\i (00:13:23) zoom in 1 
-\i (00:13:23) setwindow pcb
-\i (00:13:23) zoom in 14.6670 89.9753
-\i (00:13:23) trapsize 707
-\i (00:13:23) zoom out 1 
-\i (00:13:23) setwindow pcb
-\i (00:13:23) zoom out 14.5823 89.9753
-\i (00:13:23) trapsize 1413
-\i (00:13:23) zoom out 1 
-\i (00:13:23) setwindow pcb
-\i (00:13:23) zoom out 14.5822 89.9754
-\i (00:13:23) trapsize 2826
-\i (00:13:24) zoom in 1 
-\i (00:13:24) setwindow pcb
-\i (00:13:24) zoom in 17.6912 90.6536
-\i (00:13:24) trapsize 1413
-\i (00:13:24) zoom in 1 
-\i (00:13:24) setwindow pcb
-\i (00:13:24) zoom in 11.4166 91.1058
-\i (00:13:24) trapsize 707
-\i (00:13:25) zoom in 1 
-\i (00:13:25) setwindow pcb
-\i (00:13:25) zoom in 10.4274 91.1200
-\i (00:13:25) trapsize 353
-\i (00:13:37) zoom out 1 
-\i (00:13:37) setwindow pcb
-\i (00:13:37) zoom out 7.3042 91.9679
-\i (00:13:37) trapsize 707
-\i (00:13:37) zoom out 1 
-\i (00:13:37) setwindow pcb
-\i (00:13:37) zoom out 7.3749 91.7842
-\i (00:13:37) trapsize 1413
-\i (00:13:38) zoom in 1 
-\i (00:13:38) setwindow pcb
-\i (00:13:38) zoom in 15.7128 90.5123
-\i (00:13:38) trapsize 707
-\i (00:13:38) zoom in 1 
-\i (00:13:38) setwindow pcb
-\i (00:13:38) zoom in 15.4585 90.2862
-\i (00:13:38) trapsize 353
-\i (00:13:39) zoom out 1 
-\i (00:13:39) setwindow pcb
-\i (00:13:39) zoom out 13.0278 90.6466
-\i (00:13:39) trapsize 707
-\i (00:13:59) zoom in 1 
-\i (00:13:59) setwindow pcb
-\i (00:13:59) zoom in 18.7796 87.8202
-\i (00:13:59) trapsize 353
-\i (00:13:59) zoom out 1 
-\i (00:13:59) setwindow pcb
-\i (00:13:59) zoom out 18.7796 87.8202
-\i (00:13:59) trapsize 707
-\i (00:14:18) zoom out 1 
-\i (00:14:18) setwindow pcb
-\i (00:14:18) zoom out 20.5178 89.3464
-\i (00:14:18) trapsize 1413
-\i (00:14:18) zoom out 1 
-\i (00:14:18) setwindow pcb
-\i (00:14:18) zoom out 20.5178 89.3464
-\i (00:14:18) trapsize 2826
-\i (00:14:18) zoom out 1 
-\i (00:14:18) setwindow pcb
-\i (00:14:18) zoom out 20.5178 89.3465
-\i (00:14:18) trapsize 5653
-\i (00:14:18) zoom out 1 
-\i (00:14:18) setwindow pcb
-\i (00:14:18) zoom out 20.5178 89.3464
-\i (00:14:18) trapsize 11306
-\i (00:14:19) zoom out 1 
-\i (00:14:19) setwindow pcb
-\i (00:14:19) zoom out 37.0238 62.2130
-\i (00:14:19) trapsize 22611
-\i (00:14:20) zoom in 1 
-\i (00:14:20) setwindow pcb
-\i (00:14:20) zoom in 17.1260 21.0606
-\i (00:14:20) trapsize 11306
-\i (00:14:20) zoom in 1 
-\i (00:14:20) setwindow pcb
-\i (00:14:20) zoom in 17.1260 20.8345
-\i (00:14:20) trapsize 5653
-\i (00:14:20) zoom in 1 
-\i (00:14:20) setwindow pcb
-\i (00:14:20) zoom in 17.1260 20.8346
-\i (00:14:20) trapsize 2826
-\i (00:14:20) zoom in 1 
-\i (00:14:20) setwindow pcb
-\i (00:14:20) zoom in 19.5002 23.7741
-\i (00:14:20) trapsize 1413
-\i (00:14:21) zoom out 1 
-\i (00:14:21) setwindow pcb
-\i (00:14:21) zoom out 15.0911 25.2438
-\i (00:14:21) trapsize 2826
-\i (00:14:21) zoom out 1 
-\i (00:14:21) setwindow pcb
-\i (00:14:21) zoom out 15.0911 25.2438
-\i (00:14:21) trapsize 5653
-\i (00:14:21) zoom out 1 
-\i (00:14:21) setwindow pcb
-\i (00:14:21) zoom out 15.0910 25.2439
-\i (00:14:21) trapsize 11306
-\i (00:14:22) zoom out 1 
-\i (00:14:22) setwindow pcb
-\i (00:14:22) zoom out 15.0909 25.2438
-\i (00:14:22) trapsize 22611
-\i (00:14:23) zoom in 1 
-\i (00:14:23) setwindow pcb
-\i (00:14:23) zoom in -31.0359 19.8172
-\i (00:14:23) trapsize 11306
-\i (00:14:23) zoom in 1 
-\i (00:14:23) setwindow pcb
-\i (00:14:23) zoom in -31.0359 19.8172
-\i (00:14:23) trapsize 5653
-\i (00:14:26) zoom in 1 
-\i (00:14:26) setwindow pcb
-\i (00:14:26) zoom in 43.8071 20.6086
-\i (00:14:26) trapsize 2826
-\i (00:14:26) zoom in 1 
-\i (00:14:26) setwindow pcb
-\i (00:14:26) zoom in 43.8071 20.6086
-\i (00:14:26) trapsize 1413
-\i (00:14:26) zoom in 1 
-\i (00:14:26) setwindow pcb
-\i (00:14:26) zoom in 37.9847 22.4740
-\i (00:14:26) trapsize 707
-\i (00:14:26) zoom in 1 
-\i (00:14:26) setwindow pcb
-\i (00:14:26) zoom in 34.7627 23.2371
-\i (00:14:26) trapsize 353
-\i (00:14:27) zoom in 1 
-\i (00:14:27) setwindow pcb
-\i (00:14:27) zoom in 34.7627 23.2442
-\i (00:14:27) trapsize 177
-\i (00:14:28) zoom out 1 
-\i (00:14:28) setwindow pcb
-\i (00:14:28) zoom out 35.8756 23.5798
-\i (00:14:28) trapsize 353
-\i (00:14:29) zoom in 1 
-\i (00:14:29) setwindow pcb
-\i (00:14:29) zoom in 35.9534 24.8518
-\i (00:14:29) trapsize 177
-\i (00:14:34) zoom out 1 
-\i (00:14:34) setwindow pcb
-\i (00:14:34) zoom out 35.6743 24.3077
-\i (00:14:34) trapsize 353
-\i (00:14:34) zoom out 1 
-\i (00:14:34) setwindow pcb
-\i (00:14:34) zoom out 35.6955 24.3006
-\i (00:14:34) trapsize 707
-\i (00:14:34) zoom out 1 
-\i (00:14:34) setwindow pcb
-\i (00:14:34) zoom out 37.2500 23.9333
-\i (00:14:34) trapsize 1413
-\i (00:14:34) zoom out 1 
-\i (00:14:34) setwindow pcb
-\i (00:14:34) zoom out 37.3630 23.8485
-\i (00:14:34) trapsize 2826
-\i (00:14:34) zoom out 1 
-\i (00:14:34) setwindow pcb
-\i (00:14:34) zoom out 39.9633 24.0180
-\i (00:14:34) trapsize 5653
-\i (00:14:38) zoom out 1 
-\i (00:14:38) setwindow pcb
-\i (00:14:38) zoom out 52.9648 39.7328
-\i (00:14:38) trapsize 11306
-\i (00:14:39) zoom in 1 
-\i (00:14:39) setwindow pcb
-\i (00:14:39) zoom in 60.9917 57.1434
-\i (00:14:39) trapsize 5653
-\i (00:14:40) zoom in 1 
-\i (00:14:40) setwindow pcb
-\i (00:14:40) zoom in 55.6781 61.3265
-\i (00:14:40) trapsize 2826
-\i (00:14:40) zoom in 1 
-\i (00:14:40) setwindow pcb
-\i (00:14:40) zoom in 56.1868 61.4395
-\i (00:14:40) trapsize 1413
-\i (00:14:40) zoom in 1 
-\i (00:14:40) setwindow pcb
-\i (00:14:40) zoom in 58.3914 55.7868
-\i (00:14:40) trapsize 707
-\i (00:14:40) zoom in 1 
-\i (00:14:40) setwindow pcb
-\i (00:14:40) zoom in 58.4762 56.3662
-\i (00:14:40) trapsize 353
-\i (00:14:41) zoom out 1 
-\i (00:14:41) setwindow pcb
-\i (00:14:41) zoom out 58.1794 57.2636
-\i (00:14:41) trapsize 707
-\i (00:14:42) zoom out 1 
-\i (00:14:42) setwindow pcb
-\i (00:14:42) zoom out 57.2327 58.0268
-\i (00:14:42) trapsize 1413
-\i (00:14:42) zoom in 1 
-\i (00:14:42) setwindow pcb
-\i (00:14:42) zoom in 57.1761 59.5531
-\i (00:14:42) trapsize 707
-\i (00:14:42) zoom in 1 
-\i (00:14:42) setwindow pcb
-\i (00:14:42) zoom in 57.1761 59.5673
-\i (00:14:42) trapsize 353
-\i (00:14:43) zoom out 1 
-\i (00:14:43) setwindow pcb
-\i (00:14:43) zoom out 56.7521 58.7901
-\i (00:14:43) trapsize 707
-\i (00:14:43) zoom out 1 
-\i (00:14:43) setwindow pcb
-\i (00:14:43) zoom out 57.1761 59.3130
-\i (00:14:43) trapsize 1413
-\i (00:14:44) zoom in 1 
-\i (00:14:44) setwindow pcb
-\i (00:14:44) zoom in 58.1937 59.8217
-\i (00:14:44) trapsize 707
-\i (00:14:45) zoom in 1 
-\i (00:14:45) setwindow pcb
-\i (00:14:45) zoom in 54.6607 58.3520
-\i (00:14:45) trapsize 353
-\i (00:14:46) zoom out 1 
-\i (00:14:46) setwindow pcb
-\i (00:14:46) zoom out 56.5756 57.3557
-\i (00:14:46) trapsize 707
-\i (00:14:46) zoom out 1 
-\i (00:14:46) setwindow pcb
-\i (00:14:46) zoom out 56.5756 57.3558
-\i (00:14:46) trapsize 1413
-\i (00:14:50) zoom in 1 
-\i (00:14:50) setwindow pcb
-\i (00:14:50) zoom in 57.5365 58.5994
-\i (00:14:50) trapsize 707
-\i (00:14:51) zoom in 1 
-\i (00:14:51) setwindow pcb
-\i (00:14:51) zoom in 58.4269 57.3275
-\i (00:14:51) trapsize 353
-\i (00:14:52) zoom in 1 
-\i (00:14:52) setwindow pcb
-\i (00:14:52) zoom in 59.6563 57.2851
-\i (00:14:52) trapsize 177
-\i (00:14:52) zoom out 1 
-\i (00:14:52) setwindow pcb
-\i (00:14:52) zoom out 59.6387 57.2675
-\i (00:14:52) trapsize 353
-\i (00:15:56) zoom in 1 
-\i (00:15:56) setwindow pcb
-\i (00:15:56) zoom in 55.7666 57.3381
-\i (00:15:56) trapsize 177
-\i (00:15:57) zoom in 1 
-\i (00:15:57) setwindow pcb
-\i (00:15:57) zoom in 55.9327 57.4618
-\i (00:15:57) trapsize 88
-\i (00:15:57) zoom out 1 
-\i (00:15:57) setwindow pcb
-\i (00:15:57) zoom out 55.9945 57.4230
-\i (00:15:57) trapsize 177
-\i (00:15:58) zoom out 1 
-\i (00:15:58) setwindow pcb
-\i (00:15:58) zoom out 55.9945 57.4229
-\i (00:15:58) trapsize 353
-\i (00:15:58) zoom out 1 
-\i (00:15:58) setwindow pcb
-\i (00:15:58) zoom out 55.9946 57.4230
-\i (00:15:58) trapsize 707
-\i (00:15:59) zoom in 1 
-\i (00:15:59) setwindow pcb
-\i (00:15:59) zoom in 55.9946 57.4513
-\i (00:15:59) trapsize 353
-\i (00:15:59) zoom in 1 
-\i (00:15:59) setwindow pcb
-\i (00:15:59) zoom in 56.0228 57.6068
-\i (00:15:59) trapsize 177
-\i (00:16:00) zoom in 1 
-\i (00:16:00) setwindow pcb
-\i (00:16:00) zoom in 56.0229 57.6068
-\i (00:16:00) trapsize 88
-\i (00:16:02) zoom out 1 
-\i (00:16:02) setwindow pcb
-\i (00:16:02) zoom out 56.0229 57.6069
-\i (00:16:02) trapsize 177
-\i (00:16:02) zoom out 1 
-\i (00:16:02) setwindow pcb
-\i (00:16:02) zoom out 56.0193 57.5962
-\i (00:16:02) trapsize 353
-\i (00:16:03) zoom out 1 
-\i (00:16:03) setwindow pcb
-\i (00:16:03) zoom out 55.9628 57.5186
-\i (00:16:03) trapsize 707
-\i (00:16:03) zoom out 1 
-\i (00:16:03) setwindow pcb
-\i (00:16:03) zoom out 55.9064 57.4620
-\i (00:16:03) trapsize 1413
-\i (00:16:03) zoom out 1 
-\i (00:16:03) setwindow pcb
-\i (00:16:03) zoom out 55.1150 54.0421
-\i (00:16:03) trapsize 2826
-\i (00:16:04) zoom out 1 
-\i (00:16:04) setwindow pcb
-\i (00:16:04) zoom out 50.5927 52.9680
-\i (00:16:04) trapsize 5653
-\i (00:16:04) zoom out 1 
-\i (00:16:04) setwindow pcb
-\i (00:16:04) zoom out 50.1404 52.5158
-\i (00:16:04) trapsize 11306
-\i (00:16:04) zoom out 1 
-\i (00:16:04) setwindow pcb
-\i (00:16:04) zoom out 28.2075 28.7740
-\i (00:16:04) trapsize 22611
-\i (00:16:04) zoom out 1 
-\i (00:16:04) setwindow pcb
-\i (00:16:04) zoom out 22.7809 22.8951
-\i (00:16:04) trapsize 45222
-\i (00:16:04) zoom out 1 
-\i (00:16:04) setwindow pcb
-\i (00:16:04) zoom out 108.9274 10.2329
-\i (00:16:04) trapsize 90445
-\i (00:16:05) zoom in 1 
-\i (00:16:05) setwindow pcb
-\i (00:16:05) zoom in -18.5997 28.4315
-\i (00:16:05) trapsize 45222
-\i (00:16:05) zoom in 1 
-\i (00:16:05) setwindow pcb
-\i (00:16:05) zoom in -18.5997 28.4316
-\i (00:16:05) trapsize 22611
-\i (00:16:05) zoom in 1 
-\i (00:16:05) setwindow pcb
-\i (00:16:05) zoom in -18.5996 28.4316
-\i (00:16:05) trapsize 11306
-\i (00:16:05) zoom in 1 
-\i (00:16:05) setwindow pcb
-\i (00:16:05) zoom in -18.5996 28.4316
-\i (00:16:05) trapsize 5653
-\i (00:16:05) zoom in 1 
-\i (00:16:05) setwindow pcb
-\i (00:16:05) zoom in 7.9686 29.4492
-\i (00:16:05) trapsize 2826
-\i (00:16:06) zoom out 1 
-\i (00:16:06) setwindow pcb
-\i (00:16:06) zoom out 13.8475 31.0320
-\i (00:16:06) trapsize 5653
-\i (00:16:07) drag_start grid 36.0065 29.7884
-\i (00:16:07) drag_stop 32.3887 39.7373
-\i (00:16:08) drag_start grid -18.0342 33.1801
-\i (00:16:08) drag_stop -15.9992 47.0860
-\i (00:16:09) zoom in 1 
-\i (00:16:09) setwindow pcb
-\i (00:16:09) zoom in 35.1021 20.4048
-\i (00:16:09) trapsize 2826
-\i (00:16:09) zoom in 1 
-\i (00:16:09) setwindow pcb
-\i (00:16:09) zoom in 35.1021 20.4048
-\i (00:16:09) trapsize 1413
-\i (00:16:09) zoom in 1 
-\i (00:16:09) setwindow pcb
-\i (00:16:09) zoom in 35.1304 20.8005
-\i (00:16:09) trapsize 707
-\i (00:16:09) zoom in 1 
-\i (00:16:09) setwindow pcb
-\i (00:16:09) zoom in 35.2717 21.7756
-\i (00:16:09) trapsize 353
-\i (00:16:09) zoom in 1 
-\i (00:16:09) setwindow pcb
-\i (00:16:09) zoom in 35.2718 21.7756
-\i (00:16:09) trapsize 177
-\i (00:16:10) zoom out 1 
-\i (00:16:10) setwindow pcb
-\i (00:16:10) zoom out 35.3107 22.9026
-\i (00:16:10) trapsize 353
-\i (00:16:10) zoom out 1 
-\i (00:16:10) setwindow pcb
-\i (00:16:10) zoom out 35.2895 22.8956
-\i (00:16:10) trapsize 707
-\i (00:16:10) zoom in 1 
-\i (00:16:10) setwindow pcb
-\i (00:16:10) zoom in 37.1408 24.2805
-\i (00:16:10) trapsize 353
-\i (00:16:10) zoom in 1 
-\i (00:16:10) setwindow pcb
-\i (00:16:10) zoom in 37.1408 24.2805
-\i (00:16:10) trapsize 177
-\i (00:16:11) zoom in 1 
-\i (00:16:11) setwindow pcb
-\i (00:16:11) zoom in 36.2081 23.8848
-\i (00:16:11) trapsize 88
-\i (00:16:13) zoom out 1 
-\i (00:16:13) setwindow pcb
-\i (00:16:13) zoom out 36.3495 23.8407
-\i (00:16:13) trapsize 177
-\i (00:16:15) zoom out 1 
-\i (00:16:15) setwindow pcb
-\i (00:16:15) zoom out 36.3353 23.7559
-\i (00:16:15) trapsize 353
-\i (00:16:15) zoom out 1 
-\i (00:16:15) setwindow pcb
-\i (00:16:15) zoom out 36.3353 23.7559
-\i (00:16:15) trapsize 707
-\i (00:16:15) zoom out 1 
-\i (00:16:15) setwindow pcb
-\i (00:16:15) zoom out 35.9679 24.7876
-\i (00:16:15) trapsize 1413
-\i (00:16:16) zoom out 1 
-\i (00:16:16) setwindow pcb
-\i (00:16:16) zoom out 33.8199 27.5009
-\i (00:16:16) trapsize 2826
-\i (00:16:17) zoom in 1 
-\i (00:16:17) setwindow pcb
-\i (00:16:17) zoom in 34.9505 36.9411
-\i (00:16:17) trapsize 1413
-\i (00:16:17) zoom in 1 
-\i (00:16:17) setwindow pcb
-\i (00:16:17) zoom in 35.1766 36.7715
-\i (00:16:17) trapsize 707
-\i (00:16:17) zoom out 1 
-\i (00:16:17) setwindow pcb
-\i (00:16:17) zoom out 35.3038 32.6026
-\i (00:16:17) trapsize 1413
-\i (00:16:17) zoom out 1 
-\i (00:16:17) setwindow pcb
-\i (00:16:17) zoom out 35.3038 32.5178
-\i (00:16:17) trapsize 2826
-\i (00:16:18) zoom in 1 
-\i (00:16:18) setwindow pcb
-\i (00:16:18) zoom in 34.0037 22.1731
-\i (00:16:18) trapsize 1413
-\i (00:16:18) zoom in 1 
-\i (00:16:18) setwindow pcb
-\i (00:16:18) zoom in 34.2864 23.6994
-\i (00:16:18) trapsize 707
-\i (00:16:19) zoom in 1 
-\i (00:16:19) setwindow pcb
-\i (00:16:19) zoom in 34.3429 23.9256
-\i (00:16:19) trapsize 353
-\i (00:16:19) zoom out 1 
-\i (00:16:19) setwindow pcb
-\i (00:16:19) zoom out 31.8557 23.7631
-\i (00:16:19) trapsize 707
-\i (00:16:20) zoom out 1 
-\i (00:16:20) setwindow pcb
-\i (00:16:20) zoom out 31.9829 25.1621
-\i (00:16:20) trapsize 1413
-\i (00:16:20) zoom out 1 
-\i (00:16:20) setwindow pcb
-\i (00:16:20) zoom out 32.3787 25.3034
-\i (00:16:20) trapsize 2826
-\i (00:16:27) zoom out 1 
-\i (00:16:27) setwindow pcb
-\i (00:16:27) zoom out 40.4056 12.6977
-\i (00:16:27) trapsize 5653
-\i (00:16:27) zoom out 1 
-\i (00:16:27) setwindow pcb
-\i (00:16:27) zoom out 51.1460 15.9763
-\i (00:16:27) trapsize 11306
-\i (00:16:28) zoom in 1 
-\i (00:16:28) setwindow pcb
-\i (00:16:28) zoom in 19.9424 21.8553
-\i (00:16:28) trapsize 5653
-\i (00:16:28) zoom in 1 
-\i (00:16:28) setwindow pcb
-\i (00:16:28) zoom in 24.6908 21.8553
-\i (00:16:28) trapsize 2826
-\i (00:16:29) zoom in 1 
-\i (00:16:29) setwindow pcb
-\i (00:16:29) zoom in 29.9479 17.0505
-\i (00:16:29) trapsize 1413
-\i (00:16:30) zoom in 1 
-\i (00:16:30) setwindow pcb
-\i (00:16:30) zoom in 25.9910 17.3614
-\i (00:16:30) trapsize 707
-\i (00:16:30) zoom in 1 
-\i (00:16:30) setwindow pcb
-\i (00:16:30) zoom in 26.4997 17.6441
-\i (00:16:30) trapsize 353
-\i (00:16:31) zoom out 1 
-\i (00:16:31) setwindow pcb
-\i (00:16:31) zoom out 25.3692 18.3012
-\i (00:16:31) trapsize 707
-\i (00:16:32) zoom out 1 
-\i (00:16:32) setwindow pcb
-\i (00:16:32) zoom out 27.5737 18.0045
-\i (00:16:32) trapsize 1413
-\i (00:16:33) zoom out 1 
-\i (00:16:33) setwindow pcb
-\i (00:16:33) zoom out 34.6680 17.9196
-\i (00:16:33) trapsize 2826
-\i (00:16:33) zoom out 1 
-\i (00:16:33) setwindow pcb
-\i (00:16:33) zoom out 34.6680 17.9197
-\i (00:16:33) trapsize 5653
-\i (00:16:34) zoom in 1 
-\i (00:16:34) setwindow pcb
-\i (00:16:34) zoom in 19.2924 23.1202
-\i (00:16:34) trapsize 2826
-\i (00:16:35) zoom in 1 
-\i (00:16:35) setwindow pcb
-\i (00:16:35) zoom in 19.2924 23.1768
-\i (00:16:35) trapsize 1413
-\i (00:16:35) zoom out 1 
-\i (00:16:35) setwindow pcb
-\i (00:16:35) zoom out 20.4230 23.3747
-\i (00:16:35) trapsize 2826
-\i (00:16:36) zoom in 1 
-\i (00:16:36) setwindow pcb
-\i (00:16:36) zoom in 36.9291 24.2791
-\i (00:16:36) trapsize 1413
-\i (00:16:36) zoom in 1 
-\i (00:16:36) setwindow pcb
-\i (00:16:36) zoom in 36.9291 24.2508
-\i (00:16:36) trapsize 707
-\i (00:16:47) zoom out 1 
-\i (00:16:47) setwindow pcb
-\i (00:16:47) zoom out 37.7205 24.2650
-\i (00:16:47) trapsize 1413
-\i (00:16:48) zoom out 1 
-\i (00:16:48) setwindow pcb
-\i (00:16:48) zoom out 37.4096 25.5369
-\i (00:16:48) trapsize 2826
-\i (00:16:53) zoom in 1 
-\i (00:16:53) setwindow pcb
-\i (00:16:53) zoom in 34.6963 23.6715
-\i (00:16:53) trapsize 1413
-\i (00:16:53) zoom in 1 
-\i (00:16:53) setwindow pcb
-\i (00:16:53) zoom in 34.6963 23.6715
-\i (00:16:53) trapsize 707
-\i (00:16:54) zoom in 1 
-\i (00:16:54) setwindow pcb
-\i (00:16:54) zoom in 34.8659 23.6856
-\i (00:16:54) trapsize 353
-\i (00:18:46) zoom out 1 
-\i (00:18:46) setwindow pcb
-\i (00:18:46) zoom out 33.3609 23.1274
-\i (00:18:46) trapsize 707
-\i (00:18:46) zoom out 1 
-\i (00:18:46) setwindow pcb
-\i (00:18:46) zoom out 33.2337 23.1133
-\i (00:18:46) trapsize 1413
-\i (00:18:46) zoom out 1 
-\i (00:18:46) setwindow pcb
-\i (00:18:46) zoom out 33.0359 23.0002
-\i (00:18:46) trapsize 2826
-\i (00:18:47) zoom out 1 
-\i (00:18:47) setwindow pcb
-\i (00:18:47) zoom out 32.8662 24.0176
-\i (00:18:47) trapsize 5653
-\i (00:18:47) zoom out 1 
-\i (00:18:47) setwindow pcb
-\i (00:18:47) zoom out 32.8663 24.0177
-\i (00:18:47) trapsize 11306
-\i (00:18:47) zoom out 1 
-\i (00:18:47) setwindow pcb
-\i (00:18:47) zoom out 32.8662 24.0177
-\i (00:18:47) trapsize 22611
-\i (00:18:47) zoom in 1 
-\i (00:18:47) setwindow pcb
-\i (00:18:47) zoom in -37.5931 84.6156
-\i (00:18:47) trapsize 11306
-\i (00:18:47) zoom in 1 
-\i (00:18:47) setwindow pcb
-\i (00:18:47) zoom in -14.0774 83.2590
-\i (00:18:47) trapsize 5653
-\i (00:18:47) zoom in 1 
-\i (00:18:47) setwindow pcb
-\i (00:18:47) zoom in -5.5982 83.4851
-\i (00:18:47) trapsize 2826
-\i (00:18:48) zoom in 1 
-\i (00:18:48) setwindow pcb
-\i (00:18:48) zoom in 32.5017 85.5202
-\i (00:18:48) trapsize 1413
-\i (00:18:48) zoom in 1 
-\i (00:18:48) setwindow pcb
-\i (00:18:48) zoom in 26.2836 85.1811
-\i (00:18:48) trapsize 707
-\i (00:18:48) zoom out 1 
-\i (00:18:48) setwindow pcb
-\i (00:18:48) zoom out 22.3408 86.5661
-\i (00:18:48) trapsize 1413
-\i (00:18:49) zoom out 1 
-\i (00:18:49) setwindow pcb
-\i (00:18:49) zoom out 20.1928 87.4988
-\i (00:18:49) trapsize 2826
-\i (00:18:49) zoom out 1 
-\i (00:18:49) setwindow pcb
-\i (00:18:49) zoom out 20.1928 87.4987
-\i (00:18:49) trapsize 5653
-\i (00:18:50) zoom in 1 
-\i (00:18:50) setwindow pcb
-\i (00:18:50) zoom in 16.8012 94.9604
-\i (00:18:50) trapsize 2826
-\i (00:18:50) zoom in 1 
-\i (00:18:50) setwindow pcb
-\i (00:18:50) zoom in 16.8012 94.9604
-\i (00:18:50) trapsize 1413
-\i (00:18:51) zoom in 1 
-\i (00:18:51) setwindow pcb
-\i (00:18:51) zoom in 18.1296 92.1906
-\i (00:18:51) trapsize 707
-\i (00:18:51) zoom in 1 
-\i (00:18:51) setwindow pcb
-\i (00:18:51) zoom in 18.1014 92.1623
-\i (00:18:51) trapsize 353
-\i (00:18:52) zoom out 1 
-\i (00:18:52) setwindow pcb
-\i (00:18:52) zoom out 19.1260 91.2367
-\i (00:18:52) trapsize 707
-\i (00:28:15) zoom out 1 
-\i (00:28:15) setwindow pcb
-\i (00:28:15) zoom out 20.6240 92.1411
-\i (00:28:15) trapsize 1413
-\i (00:28:15) zoom out 1 
-\i (00:28:15) setwindow pcb
-\i (00:28:15) zoom out 20.1718 91.5193
-\i (00:28:15) trapsize 2826
-\i (00:28:15) zoom out 1 
-\i (00:28:15) setwindow pcb
-\i (00:28:15) zoom out 23.4504 89.6538
-\i (00:28:15) trapsize 5653
-\i (00:28:15) zoom out 1 
-\i (00:28:15) setwindow pcb
-\i (00:28:15) zoom out 23.5635 88.9756
-\i (00:28:15) trapsize 11306
-\i (00:28:16) zoom in 1 
-\i (00:28:16) setwindow pcb
-\i (00:28:16) zoom in 60.3133 82.1922
-\i (00:28:16) trapsize 5653
-\i (00:28:17) zoom in 1 
-\i (00:28:17) setwindow pcb
-\i (00:28:17) zoom in 8.9860 87.2797
-\i (00:28:17) trapsize 2826
-\i (00:28:17) zoom in 1 
-\i (00:28:17) setwindow pcb
-\i (00:28:17) zoom in 7.3467 86.9405
-\i (00:28:17) trapsize 1413
-\i (00:28:17) zoom in 1 
-\i (00:28:17) setwindow pcb
-\i (00:28:17) zoom in 7.3468 87.0254
-\i (00:28:17) trapsize 707
-\i (00:28:19) zoom out 1 
-\i (00:28:19) setwindow pcb
-\i (00:28:19) zoom out 7.5164 87.1526
-\i (00:28:19) trapsize 1413
-\i (00:28:20) zoom in 1 
-\i (00:28:20) setwindow pcb
-\i (00:28:20) zoom in 13.3105 90.0638
-\i (00:28:20) trapsize 707
-\i (00:28:21) zoom in 1 
-\i (00:28:21) setwindow pcb
-\i (00:28:21) zoom in 15.6989 89.1028
-\i (00:28:21) trapsize 353
-\i (00:28:23) zoom out 1 
-\i (00:28:23) setwindow pcb
-\i (00:28:23) zoom out 15.5505 88.9545
-\i (00:28:23) trapsize 707
-\i (00:28:23) zoom in 1 
-\i (00:28:23) setwindow pcb
-\i (00:28:23) zoom in 15.5505 88.9545
-\i (00:28:23) trapsize 353
-\i (00:28:24) zoom in 1 
-\i (00:28:24) setwindow pcb
-\i (00:28:24) zoom in 15.5505 88.9545
-\i (00:28:24) trapsize 177
-\i (00:28:25) zoom out 1 
-\i (00:28:25) setwindow pcb
-\i (00:28:25) zoom out 15.5505 88.9545
-\i (00:28:25) trapsize 353
-\i (00:28:26) zoom in 1 
-\i (00:28:26) setwindow pcb
-\i (00:28:26) zoom in 13.1763 89.3573
-\i (00:28:26) trapsize 177
-\i (00:28:26) zoom out 1 
-\i (00:28:26) setwindow pcb
-\i (00:28:26) zoom out 12.7170 89.4456
-\i (00:28:26) trapsize 353
-\i (00:28:26) zoom in 1 
-\i (00:28:26) setwindow pcb
-\i (00:28:26) zoom in 12.7170 89.4457
-\i (00:28:26) trapsize 177
-\i (00:28:26) zoom in 1 
-\i (00:28:26) setwindow pcb
-\i (00:28:26) zoom in 12.7170 89.4457
-\i (00:28:26) trapsize 88
-\i (00:28:27) zoom out 1 
-\i (00:28:27) setwindow pcb
-\i (00:28:27) zoom out 12.7170 89.4457
-\i (00:28:27) trapsize 177
-\i (00:28:28) zoom in 1 
-\i (00:28:28) setwindow pcb
-\i (00:28:28) zoom in 12.7170 89.4457
-\i (00:28:28) trapsize 88
-\i (00:28:28) zoom out 1 
-\i (00:28:28) setwindow pcb
-\i (00:28:28) zoom out 12.7170 89.4457
-\i (00:28:28) trapsize 177
-\i (00:28:28) zoom out 1 
-\i (00:28:28) setwindow pcb
-\i (00:28:28) zoom out 12.7170 89.4422
-\i (00:28:28) trapsize 353
-\i (00:28:29) zoom out 1 
-\i (00:28:29) setwindow pcb
-\i (00:28:29) zoom out 12.7170 89.4069
-\i (00:28:29) trapsize 707
-\i (00:28:29) zoom out 1 
-\i (00:28:29) setwindow pcb
-\i (00:28:29) zoom out 12.6747 89.0960
-\i (00:28:29) trapsize 1413
-\i (00:28:29) zoom out 1 
-\i (00:28:29) setwindow pcb
-\i (00:28:29) zoom out 12.5334 88.5307
-\i (00:28:29) trapsize 2826
-\i (00:28:29) zoom out 1 
-\i (00:28:29) setwindow pcb
-\i (00:28:29) zoom out 12.5334 87.2871
-\i (00:28:29) trapsize 5653
-\i (00:28:29) zoom out 1 
-\i (00:28:29) setwindow pcb
-\i (00:28:29) zoom out 18.6384 82.4257
-\i (00:28:29) trapsize 11306
-\i (00:28:29) zoom out 1 
-\i (00:28:29) setwindow pcb
-\i (00:28:29) zoom out 19.5427 74.9640
-\i (00:28:29) trapsize 22611
-\i (00:28:30) zoom in 1 
-\i (00:28:30) setwindow pcb
-\i (00:28:30) zoom in -8.9474 10.7482
-\i (00:28:30) trapsize 11306
-\i (00:28:30) zoom in 1 
-\i (00:28:30) setwindow pcb
-\i (00:28:30) zoom in -8.9474 10.7482
-\i (00:28:30) trapsize 5653
-\i (00:36:11) zoom in 1 
-\i (00:36:11) setwindow pcb
-\i (00:36:11) zoom in 5.1846 56.7619
-\i (00:36:11) trapsize 2826
-\i (00:36:11) zoom in 1 
-\i (00:36:11) setwindow pcb
-\i (00:36:11) zoom in 5.1846 56.7620
-\i (00:36:11) trapsize 1413
-\i (00:36:11) zoom in 1 
-\i (00:36:11) setwindow pcb
-\i (00:36:11) zoom in 5.1847 56.7620
-\i (00:36:11) trapsize 707
-\i (00:36:11) zoom in 1 
-\i (00:36:11) setwindow pcb
-\i (00:36:11) zoom in 10.1733 56.5641
-\i (00:36:11) trapsize 353
-\i (00:38:18) zoom out 1 
-\i (00:38:18) setwindow pcb
-\i (00:38:18) zoom out 9.2759 56.6489
-\i (00:38:18) trapsize 707
-\i (00:38:18) zoom out 1 
-\i (00:38:18) setwindow pcb
-\i (00:38:18) zoom out 9.2619 56.5359
-\i (00:38:18) trapsize 1413
-\i (00:38:18) zoom out 1 
-\i (00:38:18) setwindow pcb
-\i (00:38:18) zoom out 9.1488 56.3945
-\i (00:38:18) trapsize 2826
-\i (00:38:18) zoom out 1 
-\i (00:38:18) setwindow pcb
-\i (00:38:18) zoom out 9.1488 56.2815
-\i (00:38:18) trapsize 5653
-\i (00:38:18) zoom out 1 
-\i (00:38:18) setwindow pcb
-\i (00:38:18) zoom out 9.1488 56.2815
-\i (00:38:18) trapsize 11306
-\i (00:38:19) zoom out 1 
-\i (00:38:19) setwindow pcb
-\i (00:38:19) zoom out 14.5754 75.0488
-\i (00:38:19) trapsize 22611
-\i (00:38:19) zoom out 1 
-\i (00:38:19) setwindow pcb
-\i (00:38:19) zoom out 116.1630 183.0921
-\i (00:38:19) trapsize 45222
-\i (00:38:19) zoom out 1 
-\i (00:38:19) setwindow pcb
-\i (00:38:19) zoom out 336.8482 449.9041
-\i (00:38:19) trapsize 90445
-\i (00:38:20) zoom in 1 
-\i (00:38:20) setwindow pcb
-\i (00:38:20) zoom in -31.2620 98.9785
-\i (00:38:20) trapsize 45222
-\i (00:38:21) zoom in 1 
-\i (00:38:21) setwindow pcb
-\i (00:38:21) zoom in -33.0709 67.3229
-\i (00:38:21) trapsize 22611
-\i (00:38:21) zoom in 1 
-\i (00:38:21) setwindow pcb
-\i (00:38:21) zoom in -33.0708 67.3229
-\i (00:38:21) trapsize 11306
-\i (00:38:22) zoom in 1 
-\i (00:38:22) setwindow pcb
-\i (00:38:22) zoom in 27.7533 89.2557
-\i (00:38:22) trapsize 5653
-\i (00:38:22) zoom in 1 
-\i (00:38:22) setwindow pcb
-\i (00:38:22) zoom in 25.9445 88.6904
-\i (00:38:22) trapsize 2826
-\i (00:38:22) zoom out 1 
-\i (00:38:22) setwindow pcb
-\i (00:38:22) zoom out 25.4923 87.6730
-\i (00:38:22) trapsize 5653
-\i (00:38:23) zoom in 1 
-\i (00:38:23) setwindow pcb
-\i (00:38:23) zoom in 47.6512 90.7254
-\i (00:38:23) trapsize 2826
-\i (00:38:23) zoom in 1 
-\i (00:38:23) setwindow pcb
-\i (00:38:23) zoom in 51.5517 91.8560
-\i (00:38:23) trapsize 1413
-\i (00:38:23) zoom in 1 
-\i (00:38:23) setwindow pcb
-\i (00:38:23) zoom in 51.5517 91.8843
-\i (00:38:23) trapsize 707
-\i (00:38:24) zoom out 1 
-\i (00:38:24) setwindow pcb
-\i (00:38:24) zoom out 50.3082 91.2908
-\i (00:38:24) trapsize 1413
-\i (00:38:24) zoom out 1 
-\i (00:38:24) setwindow pcb
-\i (00:38:24) zoom out 50.2233 91.1777
-\i (00:38:24) trapsize 2826
-\i (00:38:25) zoom out 1 
-\i (00:38:25) setwindow pcb
-\i (00:38:25) zoom out 31.5126 88.5773
-\i (00:38:25) trapsize 5653
-\i (00:38:25) zoom out 1 
-\i (00:38:25) setwindow pcb
-\i (00:38:25) zoom out 20.4331 90.7254
-\i (00:38:25) trapsize 11306
-\i (00:38:26) zoom out 1 
-\i (00:38:26) setwindow pcb
-\i (00:38:26) zoom out 20.4329 88.0121
-\i (00:38:26) trapsize 22611
-\i (00:38:26) zoom out 1 
-\i (00:38:26) setwindow pcb
-\i (00:38:26) zoom out 20.4329 87.5599
-\i (00:38:26) trapsize 45222
-\i (00:38:26) zoom out 1 
-\i (00:38:26) setwindow pcb
-\i (00:38:26) zoom out 20.4329 87.5600
-\i (00:38:26) trapsize 90445
-\i (00:40:54) zoom in 1 
-\i (00:40:54) setwindow pcb
-\i (00:40:54) zoom in -15.7449 26.6227
-\i (00:40:54) trapsize 45222
-\i (00:40:54) zoom in 1 
-\i (00:40:54) setwindow pcb
-\i (00:40:54) zoom in -14.8405 26.6227
-\i (00:40:54) trapsize 22611
-\i (00:40:54) zoom in 1 
-\i (00:40:54) setwindow pcb
-\i (00:40:54) zoom in -14.3882 26.6228
-\i (00:40:54) trapsize 11306
-\i (00:40:54) zoom in 1 
-\i (00:40:54) setwindow pcb
-\i (00:40:54) zoom in -1.0476 49.0079
-\i (00:40:54) trapsize 5653
-\i (00:40:54) zoom in 1 
-\i (00:40:54) setwindow pcb
-\i (00:40:54) zoom in -1.0476 49.0079
-\i (00:40:54) trapsize 2826
-\i (00:40:55) zoom in 1 
-\i (00:40:55) setwindow pcb
-\i (00:40:55) zoom in 3.2486 55.5086
-\i (00:40:55) trapsize 1413
-\i (00:40:55) zoom out 1 
-\i (00:40:55) setwindow pcb
-\i (00:40:55) zoom out 5.3119 60.3983
-\i (00:40:55) trapsize 2826
-\i (00:40:55) zoom out 1 
-\i (00:40:55) setwindow pcb
-\i (00:40:55) zoom out 5.3119 60.3984
-\i (00:40:55) trapsize 5653
-\i (00:41:09) zoom in 1 
-\i (00:41:09) setwindow pcb
-\i (00:41:09) zoom in 11.1909 65.1467
-\i (00:41:09) trapsize 2826
-\i (00:41:10) zoom in 1 
-\i (00:41:10) setwindow pcb
-\i (00:41:10) zoom in 11.1909 65.1467
-\i (00:41:10) trapsize 1413
-\i (00:41:10) zoom in 1 
-\i (00:41:10) setwindow pcb
-\i (00:41:10) zoom in 9.4668 65.0619
-\i (00:41:10) trapsize 707
-\i (00:41:11) zoom in 1 
-\i (00:41:11) setwindow pcb
-\i (00:41:11) zoom in 9.2407 65.7686
-\i (00:41:11) trapsize 353
-\i (00:41:11) zoom in 1 
-\i (00:41:11) setwindow pcb
-\i (00:41:11) zoom in 11.2050 65.3093
-\i (00:41:11) trapsize 177
-\i (00:41:12) zoom out 1 
-\i (00:41:12) setwindow pcb
-\i (00:41:12) zoom out 11.3923 65.2528
-\i (00:41:12) trapsize 353
-\i (00:41:14) drag_start grid 10.7352 65.2246
-\i (00:41:14) drag_stop 10.9754 65.2246
-\i (00:41:14) zoom out 1 
-\i (00:41:14) setwindow pcb
-\i (00:41:14) zoom out 11.1521 65.1398
-\i (00:41:14) trapsize 707
-\i (00:41:15) zoom in 1 
-\i (00:41:15) setwindow pcb
-\i (00:41:15) zoom in 5.8809 65.5638
-\i (00:41:15) trapsize 353
-\i (00:41:16) zoom in 1 
-\i (00:41:16) setwindow pcb
-\i (00:41:16) zoom in 9.8166 65.4719
-\i (00:41:16) trapsize 177
-\i (00:43:11) zoom out 1 
-\i (00:43:11) setwindow pcb
-\i (00:43:11) zoom out 9.3291 65.8005
-\i (00:43:11) trapsize 353
-\i (00:52:31) zoom out 1 
-\i (00:52:31) setwindow pcb
-\i (00:52:31) zoom out 9.2655 65.2070
-\i (00:52:31) trapsize 707
-\i (00:52:31) zoom out 1 
-\i (00:52:31) setwindow pcb
-\i (00:52:31) zoom out 9.1525 65.0940
-\i (00:52:31) trapsize 1413
-\i (00:52:31) zoom in 1 
-\i (00:52:31) setwindow pcb
-\i (00:52:31) zoom in 8.4177 64.5571
-\i (00:52:31) trapsize 707
-\i (00:52:31) zoom out 1 
-\i (00:52:31) setwindow pcb
-\i (00:52:31) zoom out 8.3612 64.5147
-\i (00:52:31) trapsize 1413
-\i (00:52:32) zoom out 1 
-\i (00:52:32) setwindow pcb
-\i (00:52:32) zoom out 8.1068 62.5646
-\i (00:52:32) trapsize 2826
-\i (00:52:32) zoom out 1 
-\i (00:52:32) setwindow pcb
-\i (00:52:32) zoom out 9.4069 62.4515
-\i (00:52:32) trapsize 5653
-\i (00:52:32) zoom out 1 
-\i (00:52:32) setwindow pcb
-\i (00:52:32) zoom out 9.8591 63.0167
-\i (00:52:32) trapsize 11306
-\i (00:52:32) zoom out 1 
-\i (00:52:32) setwindow pcb
-\i (00:52:32) zoom out 25.7182 70.0262
-\i (00:52:32) trapsize 22611
-\i (00:52:32) zoom in 1 
-\i (00:52:32) setwindow pcb
-\i (00:52:32) zoom in 154.1498 87.2206
-\i (00:52:32) trapsize 11306
-\i (00:52:33) zoom out 1 
-\i (00:52:33) setwindow pcb
-\i (00:52:33) zoom out 38.3805 78.8545
-\i (00:52:33) trapsize 22611
-\i (00:52:33) zoom out 1 
-\i (00:52:33) setwindow pcb
-\i (00:52:33) zoom out 38.3805 77.4978
-\i (00:52:33) trapsize 45222
-\i (00:52:33) zoom out 1 
-\i (00:52:33) setwindow pcb
-\i (00:52:33) zoom out 38.3805 238.2634
-\i (00:52:33) trapsize 90445
-\i (00:52:34) zoom in 1 
-\i (00:52:34) setwindow pcb
-\i (00:52:34) zoom in -24.9309 60.9917
-\i (00:52:34) trapsize 45222
-\i (00:52:34) zoom in 1 
-\i (00:52:34) setwindow pcb
-\i (00:52:34) zoom in -14.9820 107.1186
-\i (00:52:34) trapsize 22611
-\i (00:52:34) zoom in 1 
-\i (00:52:34) setwindow pcb
-\i (00:52:34) zoom in -15.8864 102.1442
-\i (00:52:34) trapsize 11306
-\i (00:52:34) zoom in 1 
-\i (00:52:34) setwindow pcb
-\i (00:52:34) zoom in -15.8864 100.3353
-\i (00:52:34) trapsize 5653
-\i (00:52:35) zoom out 1 
-\i (00:52:35) setwindow pcb
-\i (00:52:35) zoom out 18.7087 95.4740
-\i (00:52:35) trapsize 11306
-\i (00:52:35) zoom out 1 
-\i (00:52:35) setwindow pcb
-\i (00:52:35) zoom out 18.0304 95.0217
-\i (00:52:35) trapsize 22611
-\i (00:52:35) zoom in 1 
-\i (00:52:35) setwindow pcb
-\i (00:52:35) zoom in 6.7248 77.8372
-\i (00:52:35) trapsize 11306
-\i (00:52:35) zoom in 1 
-\i (00:52:35) setwindow pcb
-\i (00:52:35) zoom in 6.7248 78.0634
-\i (00:52:35) trapsize 5653
-\i (00:52:36) zoom in 1 
-\i (00:52:36) setwindow pcb
-\i (00:52:36) zoom in 12.4906 83.9423
-\i (00:52:36) trapsize 2826
-\i (00:52:36) zoom in 1 
-\i (00:52:36) setwindow pcb
-\i (00:52:36) zoom in 12.4906 83.9989
-\i (00:52:36) trapsize 1413
-\i (00:52:36) zoom in 1 
-\i (00:52:36) setwindow pcb
-\i (00:52:36) zoom in 17.6630 88.6342
-\i (00:52:36) trapsize 707
-\i (00:52:59) zoom out 1 
-\i (00:52:59) setwindow pcb
-\i (00:52:59) zoom out 27.9229 89.8354
-\i (00:52:59) trapsize 1413
-\i (00:52:59) zoom out 1 
-\i (00:52:59) setwindow pcb
-\i (00:52:59) zoom out 26.4814 89.3549
-\i (00:52:59) trapsize 2826
-\i (00:52:59) zoom out 1 
-\i (00:52:59) setwindow pcb
-\i (00:52:59) zoom out 20.1502 91.7291
-\i (00:52:59) trapsize 5653
-\i (00:52:59) zoom out 1 
-\i (00:52:59) setwindow pcb
-\i (00:52:59) zoom out 20.6024 80.4236
-\i (00:52:59) trapsize 11306
-\i (00:53:03) zoom in 1 
-\i (00:53:03) setwindow pcb
-\i (00:53:03) zoom in -5.7113 94.6686
-\i (00:53:03) trapsize 5653
-\i (00:53:03) zoom in 1 
-\i (00:53:03) setwindow pcb
-\i (00:53:03) zoom in -5.5982 93.8772
-\i (00:53:03) trapsize 2826
-\i (00:53:04) zoom in 1 
-\i (00:53:04) setwindow pcb
-\i (00:53:04) zoom in 21.0830 90.2594
-\i (00:53:04) trapsize 1413
-\i (00:53:04) zoom in 1 
-\i (00:53:04) setwindow pcb
-\i (00:53:04) zoom in 21.3092 90.4573
-\i (00:53:04) trapsize 707
-\i (00:53:05) zoom in 1 
-\i (00:53:05) setwindow pcb
-\i (00:53:05) zoom in 24.7857 90.1464
-\i (00:53:05) trapsize 353
-\i (00:53:05) zoom out 1 
-\i (00:53:05) setwindow pcb
-\i (00:53:05) zoom out 24.7291 90.1252
-\i (00:53:05) trapsize 707
-\i (00:53:05) zoom out 1 
-\i (00:53:05) setwindow pcb
-\i (00:53:05) zoom out 24.7292 90.1253
-\i (00:53:05) trapsize 1413
-\i (00:53:06) zoom in 1 
-\i (00:53:06) setwindow pcb
-\i (00:53:06) zoom in 27.0469 90.1535
-\i (00:53:06) trapsize 707
-\i (00:53:07) zoom out 1 
-\i (00:53:07) setwindow pcb
-\i (00:53:07) zoom out 27.3437 90.3090
-\i (00:53:07) trapsize 1413
-\i (00:53:07) zoom out 1 
-\i (00:53:07) setwindow pcb
-\i (00:53:07) zoom out 27.6829 89.4610
-\i (00:53:07) trapsize 2826
-\i (00:53:08) zoom in 1 
-\i (00:53:08) setwindow pcb
-\i (00:53:08) zoom in 27.6830 89.4610
-\i (00:53:08) trapsize 1413
-\i (00:53:08) zoom in 1 
-\i (00:53:08) setwindow pcb
-\i (00:53:08) zoom in 27.7113 89.4610
-\i (00:53:08) trapsize 707
-\i (00:53:09) zoom out 1 
-\i (00:53:09) setwindow pcb
-\i (00:53:09) zoom out 27.0189 89.6730
-\i (00:53:09) trapsize 1413
-\i (00:53:09) zoom out 1 
-\i (00:53:09) setwindow pcb
-\i (00:53:09) zoom out 27.0189 89.6730
-\i (00:53:09) trapsize 2826
-\i (00:53:10) zoom out 1 
-\i (00:53:10) setwindow pcb
-\i (00:53:10) zoom out 29.3365 87.6379
-\i (00:53:10) trapsize 5653
-\i (00:53:11) zoom in 1 
-\i (00:53:11) setwindow pcb
-\i (00:53:11) zoom in 40.0763 88.3163
-\i (00:53:11) trapsize 2826
-\i (00:53:11) zoom in 1 
-\i (00:53:11) setwindow pcb
-\i (00:53:11) zoom in 37.3065 88.6555
-\i (00:53:11) trapsize 1413
-\i (00:53:11) zoom in 1 
-\i (00:53:11) setwindow pcb
-\i (00:53:11) zoom in 33.8583 89.6165
-\i (00:53:11) trapsize 707
-\i (00:53:13) zoom in 1 
-\i (00:53:13) setwindow pcb
-\i (00:53:13) zoom in 32.2756 90.1111
-\i (00:53:13) trapsize 353
-\i (00:53:13) zoom out 1 
-\i (00:53:13) setwindow pcb
-\i (00:53:13) zoom out 32.7702 89.9556
-\i (00:53:13) trapsize 707
-\i (00:53:14) zoom out 1 
-\i (00:53:14) setwindow pcb
-\i (00:53:14) zoom out 34.6922 90.2666
-\i (00:53:14) trapsize 1413
-\i (00:53:15) zoom out 1 
-\i (00:53:15) setwindow pcb
-\i (00:53:15) zoom out 36.8402 89.6731
-\i (00:53:15) trapsize 2826
-\i (00:53:16) zoom in 1 
-\i (00:53:16) setwindow pcb
-\i (00:53:16) zoom in 40.4015 89.1078
-\i (00:53:16) trapsize 1413
-\i (00:53:16) zoom in 1 
-\i (00:53:16) setwindow pcb
-\i (00:53:16) zoom in 40.4015 89.1079
-\i (00:53:16) trapsize 707
-\i (00:53:16) zoom in 1 
-\i (00:53:16) setwindow pcb
-\i (00:53:16) zoom in 40.4015 89.1079
-\i (00:53:16) trapsize 353
-\i (00:53:17) zoom out 1 
-\i (00:53:17) setwindow pcb
-\i (00:53:17) zoom out 40.0765 89.1927
-\i (00:53:17) trapsize 707
-\i (01:06:24) zoom out 1 
-\i (01:06:24) setwindow pcb
-\i (01:06:24) zoom out 36.0631 89.7722
-\i (01:06:24) trapsize 1413
-\i (01:06:24) zoom in 1 
-\i (01:06:24) setwindow pcb
-\i (01:06:24) zoom in 36.0348 89.7440
-\i (01:06:24) trapsize 707
-\i (01:06:24) zoom out 1 
-\i (01:06:24) setwindow pcb
-\i (01:06:24) zoom out 35.9924 89.6875
-\i (01:06:24) trapsize 1413
-\i (01:06:24) zoom out 1 
-\i (01:06:24) setwindow pcb
-\i (01:06:24) zoom out 35.5120 89.0374
-\i (01:06:24) trapsize 2826
-\i (01:06:24) zoom out 1 
-\i (01:06:24) setwindow pcb
-\i (01:06:24) zoom out 35.5120 89.0373
-\i (01:06:24) trapsize 5653
-\i (01:06:24) zoom out 1 
-\i (01:06:24) setwindow pcb
-\i (01:06:24) zoom out 23.9802 95.5946
-\i (01:06:24) trapsize 11306
-\i (01:06:24) zoom out 1 
-\i (01:06:24) setwindow pcb
-\i (01:06:24) zoom out 96.4912 87.0023
-\i (01:06:24) trapsize 22611
-\i (01:06:25) zoom out 1 
-\i (01:06:25) setwindow pcb
-\i (01:06:25) zoom out 300.6703 77.0534
-\i (01:06:25) trapsize 45222
-\i (01:06:25) zoom in 1 
-\i (01:06:25) setwindow pcb
-\i (01:06:25) zoom in -45.7331 36.5716
-\i (01:06:25) trapsize 22611
-\i (01:06:25) zoom in 1 
-\i (01:06:25) setwindow pcb
-\i (01:06:25) zoom in -44.3764 36.5716
-\i (01:06:25) trapsize 11306
-\i (01:06:26) zoom in 1 
-\i (01:06:26) setwindow pcb
-\i (01:06:26) zoom in -2.7718 36.3455
-\i (01:06:26) trapsize 5653
-\i (01:06:26) zoom in 1 
-\i (01:06:26) setwindow pcb
-\i (01:06:26) zoom in -5.3721 36.0063
-\i (01:06:26) trapsize 2826
-\i (01:06:26) zoom out 1 
-\i (01:06:26) setwindow pcb
-\i (01:06:26) zoom out 41.3766 42.5636
-\i (01:06:26) trapsize 5653
-\i (01:06:27) zoom in 1 
-\i (01:06:27) setwindow pcb
-\i (01:06:27) zoom in 58.3349 52.2863
-\i (01:06:27) trapsize 2826
-\i (01:06:28) zoom in 1 
-\i (01:06:28) setwindow pcb
-\i (01:06:28) zoom in 58.6176 55.5084
-\i (01:06:28) trapsize 1413
-\i (01:06:28) zoom in 1 
-\i (01:06:28) setwindow pcb
-\i (01:06:28) zoom in 58.8438 57.0065
-\i (01:06:28) trapsize 707
-\i (01:06:30) zoom in 1 
-\i (01:06:30) setwindow pcb
-\i (01:06:30) zoom in 54.3923 57.5576
-\i (01:06:30) trapsize 353
-\i (01:06:31) zoom in 1 
-\i (01:06:31) setwindow pcb
-\i (01:06:31) zoom in 54.1591 57.7131
-\i (01:06:31) trapsize 177
-\i (01:06:31) zoom out 1 
-\i (01:06:31) setwindow pcb
-\i (01:06:31) zoom out 54.1910 57.7167
-\i (01:06:31) trapsize 353
-\i (01:06:31) zoom out 1 
-\i (01:06:31) setwindow pcb
-\i (01:06:31) zoom out 54.1838 57.7025
-\i (01:06:31) trapsize 707
-\i (01:06:31) zoom out 1 
-\i (01:06:31) setwindow pcb
-\i (01:06:31) zoom out 54.1698 57.5895
-\i (01:06:31) trapsize 1413
-\i (01:06:32) zoom in 1 
-\i (01:06:32) setwindow pcb
-\i (01:06:32) zoom in 60.2466 57.7592
-\i (01:06:32) trapsize 707
-\i (01:06:32) zoom in 1 
-\i (01:06:32) setwindow pcb
-\i (01:06:32) zoom in 60.9956 58.0560
-\i (01:06:32) trapsize 353
-\i (01:06:32) zoom out 1 
-\i (01:06:32) setwindow pcb
-\i (01:06:32) zoom out 60.6281 57.6603
-\i (01:06:32) trapsize 707
-\i (01:06:32) zoom out 1 
-\i (01:06:32) setwindow pcb
-\i (01:06:32) zoom out 60.5858 57.4907
-\i (01:06:32) trapsize 1413
-\i (01:06:33) zoom out 1 
-\i (01:06:33) setwindow pcb
-\i (01:06:33) zoom out 59.0596 56.9255
-\i (01:06:33) trapsize 2826
-\i (01:06:33) zoom out 1 
-\i (01:06:33) setwindow pcb
-\i (01:06:33) zoom out 58.7770 56.3602
-\i (01:06:33) trapsize 5653
-\i (01:06:37) zoom out 1 
-\i (01:06:37) setwindow pcb
-\i (01:06:37) zoom out 72.2307 30.9226
-\i (01:06:37) trapsize 11306
-\i (01:06:37) zoom out 1 
-\i (01:06:37) setwindow pcb
-\i (01:06:37) zoom out 159.1242 30.9227
-\i (01:06:37) trapsize 22611
-\i (01:06:38) zoom in 1 
-\i (01:06:38) setwindow pcb
-\i (01:06:38) zoom in 98.0740 24.1393
-\i (01:06:38) trapsize 11306
-\i (01:06:39) zoom in 1 
-\i (01:06:39) setwindow pcb
-\i (01:06:39) zoom in 53.7561 22.1043
-\i (01:06:39) trapsize 5653
-\i (01:06:39) zoom in 1 
-\i (01:06:39) setwindow pcb
-\i (01:06:39) zoom in 53.7561 22.1043
-\i (01:06:39) trapsize 2826
-\i (01:06:40) zoom in 1 
-\i (01:06:40) setwindow pcb
-\i (01:06:40) zoom in 62.1788 33.0708
-\i (01:06:40) trapsize 1413
-\i (01:06:41) zoom out 1 
-\i (01:06:41) setwindow pcb
-\i (01:06:41) zoom out 65.7966 34.5123
-\i (01:06:41) trapsize 2826
-\i (01:06:41) zoom in 1 
-\i (01:06:41) setwindow pcb
-\i (01:06:41) zoom in 64.7226 42.2001
-\i (01:06:41) trapsize 1413
-\i (01:06:41) zoom in 1 
-\i (01:06:41) setwindow pcb
-\i (01:06:41) zoom in 66.4750 42.9915
-\i (01:06:41) trapsize 707
-\i (01:10:08) zoom out 1 
-\i (01:10:08) setwindow pcb
-\i (01:10:08) zoom out 63.0692 39.9814
-\i (01:10:08) trapsize 1413
-\i (01:10:08) zoom out 1 
-\i (01:10:08) setwindow pcb
-\i (01:10:08) zoom out 62.8713 39.9248
-\i (01:10:08) trapsize 2826
-\i (01:10:09) zoom out 1 
-\i (01:10:09) setwindow pcb
-\i (01:10:09) zoom out 49.8698 43.3165
-\i (01:10:09) trapsize 5653
-\i (01:10:09) zoom out 1 
-\i (01:10:09) setwindow pcb
-\i (01:10:09) zoom out 49.7568 43.3166
-\i (01:10:09) trapsize 11306
-\i (01:10:09) zoom out 1 
-\i (01:10:09) setwindow pcb
-\i (01:10:09) zoom out 49.7568 43.3166
-\i (01:10:09) trapsize 22611
-\i (01:10:09) zoom out 1 
-\i (01:10:09) setwindow pcb
-\i (01:10:09) zoom out 49.3045 101.2396
-\i (01:10:09) trapsize 45222
-\i (01:10:10) zoom in 1 
-\i (01:10:10) setwindow pcb
-\i (01:10:10) zoom in -13.1023 85.4117
-\i (01:10:10) trapsize 22611
-\i (01:10:10) zoom in 1 
-\i (01:10:10) setwindow pcb
-\i (01:10:10) zoom in -13.1023 85.4118
-\i (01:10:10) trapsize 11306
-\i (01:10:11) zoom in 1 
-\i (01:10:11) setwindow pcb
-\i (01:10:11) zoom in -1.5705 90.8385
-\i (01:10:11) trapsize 5653
-\i (01:10:11) zoom in 1 
-\i (01:10:11) setwindow pcb
-\i (01:10:11) zoom in -2.0227 90.6124
-\i (01:10:11) trapsize 2826
-\i (01:10:11) zoom in 1 
-\i (01:10:11) setwindow pcb
-\i (01:10:11) zoom in 19.1753 88.5209
-\i (01:10:11) trapsize 1413
-\i (01:10:12) zoom in 1 
-\i (01:10:12) setwindow pcb
-\i (01:10:12) zoom in 13.2116 89.4819
-\i (01:10:12) trapsize 707
-\i (01:10:12) zoom in 1 
-\i (01:10:12) setwindow pcb
-\i (01:10:12) zoom in 14.3988 89.9483
-\i (01:10:12) trapsize 353
-\i (01:10:13) zoom out 1 
-\i (01:10:13) setwindow pcb
-\i (01:10:13) zoom out 14.7874 90.0049
-\i (01:10:13) trapsize 707
-\i (13:16:02) zoom out 1 
-\i (13:16:02) setwindow pcb
-\i (13:16:02) zoom out 20.4120 90.6549
-\i (13:16:02) trapsize 1413
-\i (13:16:02) zoom out 1 
-\i (13:16:02) setwindow pcb
-\i (13:16:02) zoom out 20.4403 90.5702
-\i (13:16:02) trapsize 2826
-\i (13:16:02) zoom out 1 
-\i (13:16:02) setwindow pcb
-\i (13:16:02) zoom out 20.4404 90.5702
-\i (13:16:02) trapsize 5653
-\i (13:16:02) zoom out 1 
-\i (13:16:02) setwindow pcb
-\i (13:16:02) zoom out 20.4404 90.5702
-\i (13:16:02) trapsize 11306
-\i (13:16:03) zoom out 1 
-\i (13:16:03) setwindow pcb
-\i (13:16:03) zoom out 61.4439 29.9723
-\i (13:16:03) trapsize 22611
-\i (13:16:04) zoom out 1 
-\i (13:16:04) setwindow pcb
-\i (13:16:04) zoom out 4.4637 29.0678
-\i (13:16:04) trapsize 45222
-\i (13:16:04) zoom out 1 
-\i (13:16:04) setwindow pcb
-\i (13:16:04) zoom out 57.3739 40.8256
-\i (13:16:04) trapsize 90445
-\i (13:16:04) zoom out 1 
-\i (13:16:04) setwindow pcb
-\i (13:16:04) zoom out 77.2717 55.2968
-\i (13:16:04) trapsize 180890
-\i (13:16:05) zoom in 1 
-\i (13:16:05) setwindow pcb
-\i (13:16:05) zoom in 23.0049 -24.0264
-\i (13:16:05) trapsize 90445
-\i (13:16:05) zoom in 1 
-\i (13:16:05) setwindow pcb
-\i (13:16:05) zoom in 21.1960 -24.0264
-\i (13:16:05) trapsize 45222
-\i (13:16:07) zoom out 1 
-\i (13:16:07) setwindow pcb
-\i (13:16:07) zoom out -5.0329 13.9604
-\i (13:16:07) trapsize 90445
-\i (13:16:08) zoom in 1 
-\i (13:16:08) setwindow pcb
-\i (13:16:08) zoom in -8.6507 50.1383
-\i (13:16:08) trapsize 45222
-\i (13:16:08) zoom in 1 
-\i (13:16:08) setwindow pcb
-\i (13:16:08) zoom in -8.6507 50.1383
-\i (13:16:08) trapsize 22611
-\i (13:16:09) zoom in 1 
-\i (13:16:09) setwindow pcb
-\i (13:16:09) zoom in -8.6507 49.2339
-\i (13:16:09) trapsize 11306
-\i (13:16:09) zoom in 1 
-\i (13:16:09) setwindow pcb
-\i (13:16:09) zoom in -0.2845 50.1384
-\i (13:16:09) trapsize 5653
-\i (13:16:09) zoom in 1 
-\i (13:16:09) setwindow pcb
-\i (13:16:09) zoom in -0.2845 50.1385
-\i (13:16:09) trapsize 2826
-\i (13:16:32) exit 
-\t (13:16:32)     Journal end - Wed Aug 26 08:59:54 2026
+\i (00:07:57) zoom out 26.5497 91.6375
+\i (00:07:57) trapsize 4009
+\i (00:07:57) zoom out 1 
+\i (00:07:57) setwindow pcb
+\i (00:07:57) zoom out 29.5966 88.4301
+\i (00:07:57) trapsize 8018
+\i (00:07:57) zoom out 1 
+\i (00:07:57) setwindow pcb
+\i (00:07:57) zoom out 94.8445 88.4302
+\i (00:07:57) trapsize 16037
+\i (00:07:58) zoom in 1 
+\i (00:07:58) setwindow pcb
+\i (00:07:58) zoom in 28.6134 86.8265
+\i (00:07:58) trapsize 8018
+\i (00:07:58) zoom in 1 
+\i (00:07:58) setwindow pcb
+\i (00:07:58) zoom in 39.8390 91.4771
+\i (00:07:58) trapsize 4009
+\i (00:07:58) zoom in 1 
+\i (00:07:58) setwindow pcb
+\i (00:07:58) zoom in 39.8391 91.3969
+\i (00:07:58) trapsize 2005
+\i (00:07:59) zoom in 1 
+\i (00:07:59) setwindow pcb
+\i (00:07:59) zoom in 38.3557 90.8757
+\i (00:07:59) trapsize 1002
+\i (00:07:59) zoom in 1 
+\i (00:07:59) setwindow pcb
+\i (00:07:59) zoom in 36.6719 90.9960
+\i (00:07:59) trapsize 501
+\i (00:08:03) zoom out 1 
+\i (00:08:03) setwindow pcb
+\i (00:08:03) zoom out 41.0920 90.8257
+\i (00:08:03) trapsize 1002
+\i (00:08:13) zoom out 1 
+\i (00:08:13) setwindow pcb
+\i (00:08:13) zoom out 47.9476 90.6251
+\i (00:08:13) trapsize 2005
+\i (00:08:14) zoom in 1 
+\i (00:08:14) setwindow pcb
+\i (00:08:14) zoom in 33.2742 88.2999
+\i (00:08:14) trapsize 1002
+\i (00:08:16) zoom out 1 
+\i (00:08:16) setwindow pcb
+\i (00:08:16) zoom out 20.1643 90.6653
+\i (00:08:16) trapsize 2005
+\i (00:08:16) zoom out 1 
+\i (00:08:16) setwindow pcb
+\i (00:08:16) zoom out 20.1241 90.6653
+\i (00:08:16) trapsize 4009
+\i (00:08:17) zoom in 1 
+\i (00:08:17) setwindow pcb
+\i (00:08:17) zoom in 15.1528 89.7031
+\i (00:08:17) trapsize 2005
+\i (00:08:17) zoom in 1 
+\i (00:08:17) setwindow pcb
+\i (00:08:17) zoom in 15.1529 89.7031
+\i (00:08:17) trapsize 1002
+\i (00:23:54) zoom out 1 
+\i (00:23:54) setwindow pcb
+\i (00:23:54) zoom out 36.2810 91.7077
+\i (00:23:54) trapsize 2005
+\i (00:23:55) zoom in 1 
+\i (00:23:55) setwindow pcb
+\i (00:23:55) zoom in 38.2858 92.3893
+\i (00:23:55) trapsize 1002
+\i (00:23:55) zoom in 1 
+\i (00:23:55) setwindow pcb
+\i (00:23:55) zoom in 38.2857 92.3893
+\i (00:23:55) trapsize 501
+\i (00:23:55) zoom out 1 
+\i (00:23:55) setwindow pcb
+\i (00:23:55) zoom out 38.8972 92.3492
+\i (00:23:55) trapsize 1002
+\i (00:23:55) zoom out 1 
+\i (00:23:55) setwindow pcb
+\i (00:23:55) zoom out 38.8971 92.3492
+\i (00:23:55) trapsize 2005
+\i (00:23:58) zoom out 1 
+\i (00:23:58) setwindow pcb
+\i (00:23:58) zoom out 39.6189 90.6253
+\i (00:23:58) trapsize 4009
+\i (00:23:58) zoom in 1 
+\i (00:23:58) setwindow pcb
+\i (00:23:58) zoom in 39.2180 90.0640
+\i (00:23:58) trapsize 2005
+\i (00:23:58) zoom in 1 
+\i (00:23:58) setwindow pcb
+\i (00:23:58) zoom in 39.2180 90.0641
+\i (00:23:58) trapsize 1002
+\i (00:23:59) zoom in 1 
+\i (00:23:59) setwindow pcb
+\i (00:23:59) zoom in 39.2180 90.0641
+\i (00:23:59) trapsize 501
+\i (00:24:00) zoom out 1 
+\i (00:24:00) setwindow pcb
+\i (00:24:00) zoom out 32.0116 89.7134
+\i (00:24:00) trapsize 1002
+\i (00:24:02) zoom out 1 
+\i (00:24:02) setwindow pcb
+\i (00:24:02) zoom out 23.3319 88.5707
+\i (00:24:02) trapsize 2005
+\i (00:24:02) zoom out 1 
+\i (00:24:02) setwindow pcb
+\i (00:24:02) zoom out 22.4498 88.2099
+\i (00:24:02) trapsize 4009
+\i (00:24:02) zoom out 1 
+\i (00:24:02) setwindow pcb
+\i (00:24:02) zoom out 22.3697 88.2100
+\i (00:24:02) trapsize 8018
+\i (00:24:02) zoom out 1 
+\i (00:24:02) setwindow pcb
+\i (00:24:02) zoom out 22.3697 88.2099
+\i (00:24:02) trapsize 16037
+\i (00:24:03) zoom in 1 
+\i (00:24:03) setwindow pcb
+\i (00:24:03) zoom in 23.0111 88.5306
+\i (00:24:03) trapsize 8018
+\i (00:24:03) zoom in 1 
+\i (00:24:03) setwindow pcb
+\i (00:24:03) zoom in 23.0111 88.5307
+\i (00:24:03) trapsize 4009
+\i (00:24:04) zoom out 1 
+\i (00:24:04) setwindow pcb
+\i (00:24:04) zoom out 20.8462 88.2902
+\i (00:24:04) trapsize 8018
+\i (00:24:04) zoom out 1 
+\i (00:24:04) setwindow pcb
+\i (00:24:04) zoom out 20.8462 88.2902
+\i (00:24:04) trapsize 16037
+\i (00:24:04) zoom out 1 
+\i (00:24:04) setwindow pcb
+\i (00:24:04) zoom out 17.9597 86.0450
+\i (00:24:04) trapsize 32073
+\i (00:24:04) zoom out 1 
+\i (00:24:04) setwindow pcb
+\i (00:24:04) zoom out 16.6768 83.4792
+\i (00:24:04) trapsize 64146
+\i (00:24:05) zoom in 1 
+\i (00:24:05) setwindow pcb
+\i (00:24:05) zoom in -2.5671 69.3464
+\i (00:24:05) trapsize 32073
+\i (00:24:05) zoom in 1 
+\i (00:24:05) setwindow pcb
+\i (00:24:05) zoom in -2.5671 69.3464
+\i (00:24:05) trapsize 16037
+\i (00:24:06) zoom in 1 
+\i (00:24:06) setwindow pcb
+\i (00:24:06) zoom in -0.0012 80.8927
+\i (00:24:06) trapsize 8018
+\i (00:24:06) zoom in 1 
+\i (00:24:06) setwindow pcb
+\i (00:24:06) zoom in -0.0011 80.8928
+\i (00:24:06) trapsize 4009
+\i (00:24:06) zoom in 1 
+\i (00:24:06) setwindow pcb
+\i (00:24:06) zoom in 8.4181 88.3498
+\i (00:24:06) trapsize 2005
+\i (00:24:06) zoom in 1 
+\i (00:24:06) setwindow pcb
+\i (00:24:06) zoom in 8.4181 88.3499
+\i (00:24:06) trapsize 1002
+\i (00:26:42) zoom out 1 
+\i (00:26:42) setwindow pcb
+\i (00:26:42) zoom out 12.4874 88.6506
+\i (00:26:42) trapsize 2005
+\i (00:26:43) zoom out 1 
+\i (00:26:43) setwindow pcb
+\i (00:26:43) zoom out 12.2870 87.2074
+\i (00:26:43) trapsize 4009
+\i (00:26:43) zoom out 1 
+\i (00:26:43) setwindow pcb
+\i (00:26:43) zoom out 12.2069 84.7216
+\i (00:26:43) trapsize 8018
+\i (00:26:43) zoom out 1 
+\i (00:26:43) setwindow pcb
+\i (00:26:43) zoom out 12.5276 82.4765
+\i (00:26:43) trapsize 16037
+\i (00:26:43) zoom in 1 
+\i (00:26:43) setwindow pcb
+\i (00:26:43) zoom in -19.5456 56.1766
+\i (00:26:43) trapsize 8018
+\i (00:26:43) zoom in 1 
+\i (00:26:43) setwindow pcb
+\i (00:26:43) zoom in -19.7060 56.1766
+\i (00:26:43) trapsize 4009
+\i (00:26:43) zoom in 1 
+\i (00:26:43) setwindow pcb
+\i (00:26:43) zoom in -19.7059 56.1767
+\i (00:26:43) trapsize 2005
+\i (00:26:44) zoom out 1 
+\i (00:26:44) setwindow pcb
+\i (00:26:44) zoom out 2.9458 64.2752
+\i (00:26:44) trapsize 4009
+\i (00:26:44) zoom in 1 
+\i (00:26:44) setwindow pcb
+\i (00:26:44) zoom in 2.7854 63.8743
+\i (00:26:44) trapsize 2005
+\i (00:26:44) zoom out 1 
+\i (00:26:44) setwindow pcb
+\i (00:26:44) zoom out 2.7854 63.8744
+\i (00:26:44) trapsize 4009
+\i (00:26:44) zoom out 1 
+\i (00:26:44) setwindow pcb
+\i (00:26:44) zoom out 2.7854 63.8743
+\i (00:26:44) trapsize 8018
+\i (00:26:44) zoom in 1 
+\i (00:26:44) setwindow pcb
+\i (00:26:44) zoom in 39.0372 93.7024
+\i (00:26:44) trapsize 4009
+\i (00:26:44) zoom in 1 
+\i (00:26:44) setwindow pcb
+\i (00:26:44) zoom in 34.3866 95.6268
+\i (00:26:44) trapsize 2005
+\i (00:26:44) zoom in 1 
+\i (00:26:44) setwindow pcb
+\i (00:26:44) zoom in 28.3328 95.3863
+\i (00:26:44) trapsize 1002
+\i (00:26:48) zoom in 1 
+\i (00:26:48) setwindow pcb
+\i (00:26:48) zoom in 31.0991 90.2947
+\i (00:26:48) trapsize 501
+\i (00:26:52) zoom out 1 
+\i (00:26:52) setwindow pcb
+\i (00:26:52) zoom out 24.5141 90.1143
+\i (00:26:52) trapsize 1002
+\i (00:26:53) zoom in 1 
+\i (00:26:53) setwindow pcb
+\i (00:26:53) zoom in 24.1733 91.3772
+\i (00:26:53) trapsize 501
+\i (00:26:54) zoom out 1 
+\i (00:26:54) setwindow pcb
+\i (00:26:54) zoom out 25.6667 91.2369
+\i (00:26:54) trapsize 1002
+\i (00:26:54) zoom out 1 
+\i (00:26:54) setwindow pcb
+\i (00:26:54) zoom out 25.6667 91.0967
+\i (00:26:54) trapsize 2005
+\i (00:26:55) zoom out 1 
+\i (00:26:55) setwindow pcb
+\i (00:26:55) zoom out 17.8489 90.8962
+\i (00:26:55) trapsize 4009
+\i (00:26:55) zoom in 1 
+\i (00:26:55) setwindow pcb
+\i (00:26:55) zoom in 15.8442 91.6981
+\i (00:26:55) trapsize 2005
+\i (00:26:56) zoom in 1 
+\i (00:26:56) setwindow pcb
+\i (00:26:56) zoom in 15.8443 91.6981
+\i (00:26:56) trapsize 1002
+\i (00:28:55) zoom out 1 
+\i (00:28:55) setwindow pcb
+\i (00:28:55) zoom out 24.3237 90.7159
+\i (00:28:55) trapsize 2005
+\i (00:28:55) zoom in 1 
+\i (00:28:55) setwindow pcb
+\i (00:28:55) zoom in 14.4612 92.3997
+\i (00:28:55) trapsize 1002
+\i (03:15:24) xrefdes K1 
+\i (03:15:24) xname_flush 
+\i (03:15:24) trapsize 4733
+\i (03:15:26) xrefdes K3 
+\i (03:15:26) xname_flush 
+\i (03:15:26) trapsize 4733
+\i (03:15:28) xrefdes K1 
+\i (03:15:28) xname_flush 
+\i (03:15:28) trapsize 4733
+\i (03:15:56) xrefdes U21 
+\i (03:15:56) xname_flush 
+\i (03:15:56) trapsize 1890
+\i (03:16:30) xNet Vbus+ 
+\i (03:16:30) xname_flush 
+\i (03:16:30) trapsize 7236
+\i (03:16:34) xNet Vbus+_Sw 
+\i (03:16:34) xname_flush 
+\i (03:16:34) trapsize 2674
+\i (03:16:38) xrefdes U5 
+\i (03:16:38) xname_flush 
+\i (03:16:38) trapsize 2201
+\i (04:19:50) zoom out 1 
+\i (04:19:50) setwindow pcb
+\i (04:19:50) zoom out 28.4704 33.3770
+\i (04:19:50) trapsize 4401
+\i (04:19:50) zoom out 1 
+\i (04:19:50) setwindow pcb
+\i (04:19:50) zoom out 28.4704 33.3770
+\i (04:19:50) trapsize 8803
+\i (04:20:05) zoom in 1 
+\i (04:20:05) setwindow pcb
+\i (04:20:05) zoom in 67.9549 43.7641
+\i (04:20:05) trapsize 4401
+\i (04:20:07) zoom in 1 
+\i (04:20:07) setwindow pcb
+\i (04:20:07) zoom in 45.7722 39.8910
+\i (04:20:07) trapsize 2201
+\i (04:20:17) zoom out 1 
+\i (04:20:17) setwindow pcb
+\i (04:20:17) zoom out 51.8021 36.7661
+\i (04:20:17) trapsize 4401
+\i (04:20:18) zoom out 1 
+\i (04:20:18) setwindow pcb
+\i (04:20:18) zoom out 37.8939 32.3647
+\i (04:20:18) trapsize 8803
+\i (04:20:19) zoom out 1 
+\i (04:20:19) setwindow pcb
+\i (04:20:19) zoom out 13.0703 40.4631
+\i (04:20:19) trapsize 17605
+\i (04:20:20) zoom in 1 
+\i (04:20:20) setwindow pcb
+\i (04:20:20) zoom in 16.1952 5.2524
+\i (04:20:20) trapsize 8803
+\i (04:20:20) zoom in 1 
+\i (04:20:20) setwindow pcb
+\i (04:20:20) zoom in 15.4910 4.9004
+\i (04:20:20) trapsize 4401
+\i (04:20:22) zoom in 1 
+\i (04:20:22) setwindow pcb
+\i (04:20:22) zoom in 33.5365 21.7135
+\i (04:20:22) trapsize 2201
+\i (04:20:22) zoom in 1 
+\i (04:20:22) setwindow pcb
+\i (04:20:22) zoom in 34.5488 22.3737
+\i (04:20:22) trapsize 1100
+\i (04:20:22) zoom in 1 
+\i (04:20:22) setwindow pcb
+\i (04:20:22) zoom in 34.5488 22.3737
+\i (04:20:22) trapsize 550
+\i (04:20:23) zoom in 1 
+\i (04:20:23) setwindow pcb
+\i (04:20:23) zoom in 33.8446 23.6061
+\i (04:20:23) trapsize 275
+\i (04:20:23) zoom in 1 
+\i (04:20:23) setwindow pcb
+\i (04:20:23) zoom in 33.1183 23.8152
+\i (04:20:23) trapsize 138
+\i (04:20:23) zoom out 1 
+\i (04:20:23) setwindow pcb
+\i (04:20:23) zoom out 33.3383 23.8345
+\i (04:20:23) trapsize 275
+\i (04:20:23) zoom out 1 
+\i (04:20:23) setwindow pcb
+\i (04:20:23) zoom out 33.3438 23.7850
+\i (04:20:23) trapsize 550
+\i (04:20:33) zoom out 1 
+\i (04:20:33) setwindow pcb
+\i (04:20:33) zoom out 34.9944 23.6969
+\i (04:20:33) trapsize 1100
+\i (04:20:33) zoom out 1 
+\i (04:20:33) setwindow pcb
+\i (04:20:33) zoom out 35.2585 23.6970
+\i (04:20:33) trapsize 2201
+\i (04:20:34) zoom out 1 
+\i (04:20:34) setwindow pcb
+\i (04:20:34) zoom out 35.0825 22.9047
+\i (04:20:34) trapsize 4402
+\i (04:20:34) zoom out 1 
+\i (04:20:34) setwindow pcb
+\i (04:20:34) zoom out 35.0824 22.9047
+\i (04:20:34) trapsize 8803
+\i (04:20:35) zoom in 1 
+\i (04:20:35) setwindow pcb
+\i (04:20:35) zoom in 33.6739 48.2577
+\i (04:20:35) trapsize 4402
+\i (04:20:35) zoom in 1 
+\i (04:20:35) setwindow pcb
+\i (04:20:35) zoom in 36.9311 22.7287
+\i (04:20:35) trapsize 2201
+\i (04:20:35) zoom in 1 
+\i (04:20:35) setwindow pcb
+\i (04:20:35) zoom in 36.1389 22.1125
+\i (04:20:35) trapsize 1100
+\i (04:20:36) zoom in 1 
+\i (04:20:36) setwindow pcb
+\i (04:20:36) zoom in 31.9134 24.1592
+\i (04:20:36) trapsize 550
+\i (04:20:36) zoom in 1 
+\i (04:20:36) setwindow pcb
+\i (04:20:36) zoom in 31.9134 24.1592
+\i (04:20:36) trapsize 275
+\i (04:20:37) zoom out 1 
+\i (04:20:37) setwindow pcb
+\i (04:20:37) zoom out 34.8459 23.5815
+\i (04:20:37) trapsize 550
+\i (04:20:38) zoom in 1 
+\i (04:20:38) setwindow pcb
+\i (04:20:38) zoom in 36.3204 23.2514
+\i (04:20:38) trapsize 275
+\i (04:20:40) zoom out 1 
+\i (04:20:40) setwindow pcb
+\i (04:20:40) zoom out 35.9188 23.9722
+\i (04:20:40) trapsize 550
+\i (04:20:41) zoom out 1 
+\i (04:20:41) setwindow pcb
+\i (04:20:41) zoom out 37.6905 23.9502
+\i (04:20:41) trapsize 1100
+\i (04:20:41) zoom in 1 
+\i (04:20:41) setwindow pcb
+\i (04:20:41) zoom in 39.2309 23.4440
+\i (04:20:41) trapsize 550
+\i (04:20:42) zoom in 1 
+\i (04:20:42) setwindow pcb
+\i (04:20:42) zoom in 38.5377 23.6861
+\i (04:20:42) trapsize 275
+\i (04:20:42) zoom in 1 
+\i (04:20:42) setwindow pcb
+\i (04:20:42) zoom in 38.5377 23.6861
+\i (04:20:42) trapsize 138
+\i (04:20:43) zoom out 1 
+\i (04:20:43) setwindow pcb
+\i (04:20:43) zoom out 38.2736 23.7027
+\i (04:20:43) trapsize 275
+\i (04:20:45) zoom out 1 
+\i (04:20:45) setwindow pcb
+\i (04:20:45) zoom out 35.2366 23.8787
+\i (04:20:45) trapsize 550
+\i (04:20:46) zoom out 1 
+\i (04:20:46) setwindow pcb
+\i (04:20:46) zoom out 36.1169 24.6599
+\i (04:20:46) trapsize 1100
+\i (04:20:46) zoom out 1 
+\i (04:20:46) setwindow pcb
+\i (04:20:46) zoom out 36.1169 24.5499
+\i (04:20:46) trapsize 2201
+\i (04:20:46) zoom out 1 
+\i (04:20:46) setwindow pcb
+\i (04:20:46) zoom out 36.6011 24.6819
+\i (04:20:46) trapsize 4402
+\i (04:20:47) zoom out 1 
+\i (04:20:47) setwindow pcb
+\i (04:20:47) zoom out 35.1925 31.9005
+\i (04:20:47) trapsize 8803
+\i (04:20:47) zoom in 1 
+\i (04:20:47) setwindow pcb
+\i (04:20:47) zoom in 32.9036 29.6117
+\i (04:20:47) trapsize 4402
+\i (04:20:47) zoom out 1 
+\i (04:20:47) setwindow pcb
+\i (04:20:47) zoom out 32.7276 30.4920
+\i (04:20:47) trapsize 8803
+\i (04:20:47) zoom out 1 
+\i (04:20:47) setwindow pcb
+\i (04:20:47) zoom out 32.5515 30.4920
+\i (04:20:47) trapsize 17606
+\i (04:20:48) zoom in 1 
+\i (04:20:48) setwindow pcb
+\i (04:20:48) zoom in 18.3135 52.8216
+\i (04:20:48) trapsize 8803
+\i (04:20:48) zoom in 1 
+\i (04:20:48) setwindow pcb
+\i (04:20:48) zoom in 18.3135 52.8216
+\i (04:20:48) trapsize 4402
+\i (04:20:49) zoom in 1 
+\i (04:20:49) setwindow pcb
+\i (04:20:49) zoom in 34.3352 20.6903
+\i (04:20:49) trapsize 2201
+\i (04:20:50) zoom in 1 
+\i (04:20:50) setwindow pcb
+\i (04:20:50) zoom in 32.7506 19.7220
+\i (04:20:50) trapsize 1100
+\i (04:20:50) zoom in 1 
+\i (04:20:50) setwindow pcb
+\i (04:20:50) zoom in 33.0587 21.2626
+\i (04:20:50) trapsize 550
+\i (04:20:50) zoom in 1 
+\i (04:20:50) setwindow pcb
+\i (04:20:50) zoom in 33.0587 21.2626
+\i (04:20:50) trapsize 275
+\i (04:20:51) zoom out 1 
+\i (04:20:51) setwindow pcb
+\i (04:20:51) zoom out 33.0587 23.3203
+\i (04:20:51) trapsize 550
+\i (04:20:55) zoom in 1 
+\i (04:20:55) setwindow pcb
+\i (04:20:55) zoom in 34.3352 23.7385
+\i (04:20:55) trapsize 275
+\i (04:20:56) drag_start grid 34.3023 23.7275
+\i (04:20:56) zoom in 1 
+\i (04:20:56) setwindow pcb
+\i (04:20:56) zoom in 34.3408 23.0673
+\i (04:20:56) trapsize 138
+\i (04:20:56) drag_stop 34.3573 22.9353
+\i (04:20:57) zoom out 1 
+\i (04:20:57) setwindow pcb
+\i (04:20:57) zoom out 34.3436 22.9793
+\i (04:20:57) trapsize 275
+\i (04:20:57) zoom out 1 
+\i (04:20:57) setwindow pcb
+\i (04:20:57) zoom out 34.3436 22.9793
+\i (04:20:57) trapsize 550
+\i (04:20:57) zoom out 1 
+\i (04:20:57) setwindow pcb
+\i (04:20:57) zoom out 34.3545 22.9353
+\i (04:20:57) trapsize 1100
+\i (04:20:57) zoom in 1 
+\i (04:20:57) setwindow pcb
+\i (04:20:57) zoom in 33.4742 26.5226
+\i (04:20:57) trapsize 550
+\i (04:20:58) zoom in 1 
+\i (04:20:58) setwindow pcb
+\i (04:20:58) zoom in 34.8717 23.7717
+\i (04:20:58) trapsize 275
+\i (04:21:36) help 
+\i (04:22:22) zoom out 1 
+\i (04:22:22) setwindow pcb
+\i (04:22:22) zoom out 36.1042 24.5970
+\i (04:22:22) trapsize 550
+\i (04:22:22) zoom out 1 
+\i (04:22:22) setwindow pcb
+\i (04:22:22) zoom out 36.1041 24.5090
+\i (04:22:22) trapsize 1100
+\i (04:22:22) zoom out 1 
+\i (04:22:22) setwindow pcb
+\i (04:22:22) zoom out 36.1701 24.3990
+\i (04:22:22) trapsize 2201
+\i (04:22:22) zoom out 1 
+\i (04:22:22) setwindow pcb
+\i (04:22:22) zoom out 37.1825 23.6948
+\i (04:22:22) trapsize 4402
+\i (04:22:22) zoom out 1 
+\i (04:22:22) setwindow pcb
+\i (04:22:22) zoom out 46.2497 31.2655
+\i (04:22:22) trapsize 8803
+\i (04:22:22) zoom out 1 
+\i (04:22:22) setwindow pcb
+\i (04:22:22) zoom out 85.7451 31.2656
+\i (04:22:22) trapsize 17606
+\i (04:22:23) zoom in 1 
+\i (04:22:23) setwindow pcb
+\i (04:22:23) zoom in 13.7359 82.0478
+\i (04:22:23) trapsize 8803
+\i (04:22:26) zoom in 1 
+\i (04:22:26) setwindow pcb
+\i (04:22:26) zoom in 33.2788 57.5752
+\i (04:22:26) trapsize 4402
+\i (04:22:26) zoom in 1 
+\i (04:22:26) setwindow pcb
+\i (04:22:26) zoom in 33.2788 57.5753
+\i (04:22:26) trapsize 2201
+\i (04:22:27) zoom out 1 
+\i (04:22:27) setwindow pcb
+\i (04:22:27) zoom out 36.7560 59.1599
+\i (04:22:27) trapsize 4402
+\i (04:22:27) zoom out 1 
+\i (04:22:27) setwindow pcb
+\i (04:22:27) zoom out 36.7559 59.1599
+\i (04:22:27) trapsize 8803
+\i (04:22:27) zoom in 1 
+\i (04:22:27) setwindow pcb
+\i (04:22:27) zoom in 2.7760 75.0054
+\i (04:22:27) trapsize 4402
+\i (04:22:32) zoom out 1 
+\i (04:22:32) setwindow pcb
+\i (04:22:32) zoom out 69.6795 77.9985
+\i (04:22:32) trapsize 8803
+\i (04:22:34) zoom in 1 
+\i (04:22:34) setwindow pcb
+\i (04:22:34) zoom in 73.5968 80.6394
+\i (04:22:34) trapsize 4402
+\i (04:22:34) zoom in 1 
+\i (04:22:34) setwindow pcb
+\i (04:22:34) zoom in 73.5968 80.6395
+\i (04:22:34) trapsize 2201
+\i (04:22:34) zoom in 1 
+\i (04:22:34) setwindow pcb
+\i (04:22:34) zoom in 71.6601 81.1677
+\i (04:22:34) trapsize 1100
+\i (04:22:35) zoom in 1 
+\i (04:22:35) setwindow pcb
+\i (04:22:35) zoom in 72.6285 80.9257
+\i (04:22:35) trapsize 550
+\i (04:22:35) zoom in 1 
+\i (04:22:35) setwindow pcb
+\i (04:22:35) zoom in 72.6285 80.9257
+\i (04:22:35) trapsize 275
+\i (04:23:52) zoom out 1 
+\i (04:23:52) setwindow pcb
+\i (04:23:52) zoom out 70.3892 79.9464
+\i (04:23:52) trapsize 550
+\i (04:23:55) zoom in 1 
+\i (04:23:55) setwindow pcb
+\i (04:23:55) zoom in 66.5489 80.1885
+\i (04:23:55) trapsize 275
+\i (04:23:55) zoom in 1 
+\i (04:23:55) setwindow pcb
+\i (04:23:55) zoom in 66.0538 80.2106
+\i (04:23:55) trapsize 138
+\i (04:23:55) zoom in 1 
+\i (04:23:55) setwindow pcb
+\i (04:23:55) zoom in 66.0538 80.2106
+\i (04:23:55) trapsize 69
+\i (04:23:55) zoom out 1 
+\i (04:23:55) setwindow pcb
+\i (04:23:55) zoom out 66.1597 80.2492
+\i (04:23:55) trapsize 138
+\i (04:23:55) zoom out 1 
+\i (04:23:55) setwindow pcb
+\i (04:23:55) zoom out 66.1597 80.2492
+\i (04:23:55) trapsize 275
+\i (04:23:56) zoom out 1 
+\i (04:23:56) setwindow pcb
+\i (04:23:56) zoom out 66.5283 80.3812
+\i (04:23:56) trapsize 550
+\i (04:23:58) zoom in 1 
+\i (04:23:58) setwindow pcb
+\i (04:23:58) zoom in 71.8655 80.6564
+\i (04:23:58) trapsize 275
+\i (04:23:59) zoom out 1 
+\i (04:23:59) setwindow pcb
+\i (04:23:59) zoom out 71.7500 80.5023
+\i (04:23:59) trapsize 550
+\i (04:28:30) zoom out 1 
+\i (04:28:30) setwindow pcb
+\i (04:28:30) zoom out 73.0154 79.4459
+\i (04:28:30) trapsize 1100
+\i (04:28:31) zoom out 1 
+\i (04:28:31) setwindow pcb
+\i (04:28:31) zoom out 72.3551 79.1158
+\i (04:28:31) trapsize 2201
+\i (04:28:31) zoom in 1 
+\i (04:28:31) setwindow pcb
+\i (04:28:31) zoom in 70.6824 76.9588
+\i (04:28:31) trapsize 1100
+\i (04:28:31) zoom out 1 
+\i (04:28:31) setwindow pcb
+\i (04:28:31) zoom out 70.0882 77.3990
+\i (04:28:31) trapsize 2201
+\i (04:28:31) zoom out 1 
+\i (04:28:31) setwindow pcb
+\i (04:28:31) zoom out 69.7801 77.3990
+\i (04:28:31) trapsize 4402
+\i (04:28:31) zoom out 1 
+\i (04:28:31) setwindow pcb
+\i (04:28:31) zoom out 55.2541 77.8392
+\i (04:28:31) trapsize 8804
+\i (04:28:31) zoom out 1 
+\i (04:28:31) setwindow pcb
+\i (04:28:31) zoom out 54.1977 69.5637
+\i (04:28:31) trapsize 17607
+\i (04:28:31) zoom out 1 
+\i (04:28:31) setwindow pcb
+\i (04:28:31) zoom out 108.1170 57.9431
+\i (04:28:31) trapsize 35214
+\i (04:28:31) zoom out 1 
+\i (04:28:31) setwindow pcb
+\i (04:28:31) zoom out 319.7555 52.1262
+\i (04:28:31) trapsize 70429
+\i (04:28:46) xdehilite 
+\i (04:28:46) xrefdes U5 
+\i (04:28:46) xname_flush 
+\i (04:28:46) done 
+\i (04:28:46) generaledit 
+\i (04:29:34) xNet Pb10_Usart3_Tx 
+\i (04:29:34) xname_flush 
+\i (04:29:34) trapsize 710
+\i (04:39:25) xNet Pb9 
+\i (04:39:25) xname_flush 
+\i (04:39:25) trapsize 580
+\i (04:42:22) xNet Pb10_Usart3_Tx 
+\i (04:42:22) xname_flush 
+\i (04:42:22) trapsize 710
+\i (04:42:36) xNet N3579505 
+\i (04:42:36) xname_flush 
+\i (04:42:36) trapsize 137
+\i (04:43:09) xNet N3579545 
+\i (04:43:09) xname_flush 
+\i (04:43:09) trapsize 290
+\i (04:43:17) xNet N3579545 
+\i (04:43:17) xname_flush 
+\i (04:43:17) trapsize 290
+\i (04:43:23) xNet Pa9_Usart1_Tx 
+\i (04:43:23) xname_flush 
+\i (04:43:23) trapsize 2757
+\i (06:32:33) exit 
+\e (06:32:33) Do you want to save the changes you made to HC_DFCD_Protocol_V3_0.brd?
+\i (06:32:34) fillin yes 
+\t (06:32:34)     Journal end - Wed Aug 26 17:53:03 2026
diff --git a/docs/HC_DFCD_PROTOCOL.DSN b/docs/HC_DFCD_PROTOCOL.DSN
new file mode 100644
index 0000000..0a93539
Binary files /dev/null and b/docs/HC_DFCD_PROTOCOL.DSN differ
diff --git a/docs/HC_DFCD_Protocol_V3_0.brd b/docs/HC_DFCD_Protocol_V3_0.brd
index 8cd4f63..84b50d9 100644
Binary files a/docs/HC_DFCD_Protocol_V3_0.brd and b/docs/HC_DFCD_Protocol_V3_0.brd differ
diff --git a/docs/allegro.jrl,1 b/docs/allegro.jrl,1
new file mode 100644
index 0000000..b56c5ce
--- /dev/null
+++ b/docs/allegro.jrl,1
@@ -0,0 +1,2519 @@
+\t (00:00:05) Allegro 17.2 S079 Windows SPB 64-bit Edition
+\t (00:00:05)     Journal start - Tue Aug 25 19:43:26 2026
+\t (00:00:05)         Host=DESKTOP-5RA9F3K User=Adminuser Pid=39932 CPUs=20
+\t (00:00:05) CmdLine= D:\Cadence\SPB_17.2\tools\bin\Allegro.exe D:\HC-PMP-SW\Power_ControlPannel\MP_Control_sw_405\MP_SW_Chrg\chrg\docs\HC_DFCD_Protocol_V3_0.brd
+\t (00:00:05) 
+   (00:00:05) Loading axlcore.cxt 
+\t (00:00:06) Opening existing design...
+\i (00:00:06) QtSignal SPBFoldDockArea FoldAreaTabWidget currentChanged HC_DFCD_Protocol_V3_0
+\d (00:00:06) Design opened: D:/HC-PMP-SW/Power_ControlPannel/MP_Control_sw_405/MP_SW_Chrg/chrg/docs/HC_DFCD_Protocol_V3_0.brd
+\i (00:00:06) trapsize 8975
+\i (00:00:06) trapsize 9251
+\i (00:00:06) trapsize 9375
+\i (00:00:07) trapsize 8018
+\i (00:00:07) trapsize 8018
+\i (00:00:07) generaledit 
+\i (00:00:10) zoom out 1 
+\i (00:00:10) setwindow pcb
+\i (00:00:10) zoom out 138.1616 64.8823
+\i (00:00:10) trapsize 16037
+\i (00:00:10) zoom out 1 
+\i (00:00:10) setwindow pcb
+\i (00:00:10) zoom out 201.4873 63.2786
+\i (00:00:10) trapsize 32073
+\i (00:00:10) zoom out 1 
+\i (00:00:10) setwindow pcb
+\i (00:00:10) zoom out 502.3331 132.2094
+\i (00:00:10) trapsize 64146
+\i (00:00:11) zoom in 1 
+\i (00:00:11) setwindow pcb
+\i (00:00:11) zoom in -32.0050 32.1412
+\i (00:00:11) trapsize 32073
+\i (00:00:11) zoom in 1 
+\i (00:00:11) setwindow pcb
+\i (00:00:11) zoom in -32.0050 32.1412
+\i (00:00:11) trapsize 16037
+\i (00:00:11) zoom in 1 
+\i (00:00:11) setwindow pcb
+\i (00:00:11) zoom in -32.0049 32.1412
+\i (00:00:11) trapsize 8018
+\i (00:00:11) zoom in 1 
+\i (00:00:11) setwindow pcb
+\i (00:00:11) zoom in -32.8068 31.0187
+\i (00:00:11) trapsize 4009
+\i (00:00:11) zoom out 1 
+\i (00:00:11) setwindow pcb
+\i (00:00:11) zoom out 8.5676 58.6818
+\i (00:00:11) trapsize 8018
+\i (00:00:11) zoom out 1 
+\i (00:00:11) setwindow pcb
+\i (00:00:11) zoom out 8.4072 58.2007
+\i (00:00:11) trapsize 16037
+\i (00:00:11) zoom in 1 
+\i (00:00:11) setwindow pcb
+\i (00:00:11) zoom in 80.5716 56.2764
+\i (00:00:11) trapsize 8018
+\i (00:00:12) zoom out 1 
+\i (00:00:12) setwindow pcb
+\i (00:00:12) zoom out 26.5284 75.0392
+\i (00:00:12) trapsize 16037
+\i (00:00:13) zoom in 1 
+\i (00:00:13) setwindow pcb
+\i (00:00:13) zoom in 7.2846 90.8350
+\i (00:00:13) trapsize 8018
+\i (00:00:13) zoom in 1 
+\i (00:00:13) setwindow pcb
+\i (00:00:13) zoom in 7.2846 90.8350
+\i (00:00:13) trapsize 4009
+\i (00:00:14) zoom out 1 
+\i (00:00:14) setwindow pcb
+\i (00:00:14) zoom out 38.3956 49.0598
+\i (00:00:14) trapsize 8018
+\i (00:00:14) zoom in 1 
+\i (00:00:14) setwindow pcb
+\i (00:00:14) zoom in 38.3955 49.2202
+\i (00:00:14) trapsize 4009
+\i (00:00:14) zoom out 1 
+\i (00:00:14) setwindow pcb
+\i (00:00:14) zoom out 38.2352 49.3004
+\i (00:00:14) trapsize 8018
+\i (00:00:15) zoom in 1 
+\i (00:00:15) setwindow pcb
+\i (00:00:15) zoom in 44.3291 43.6876
+\i (00:00:15) trapsize 4009
+\i (00:00:15) zoom in 1 
+\i (00:00:15) setwindow pcb
+\i (00:00:15) zoom in 44.3291 43.6876
+\i (00:00:15) trapsize 2005
+\i (00:00:15) zoom out 1 
+\i (00:00:15) setwindow pcb
+\i (00:00:15) zoom out 41.4425 44.9305
+\i (00:00:15) trapsize 4009
+\i (00:00:16) zoom out 1 
+\i (00:00:16) setwindow pcb
+\i (00:00:16) zoom out 35.8297 45.3314
+\i (00:00:16) trapsize 8018
+\i (00:00:16) zoom out 1 
+\i (00:00:16) setwindow pcb
+\i (00:00:16) zoom out 33.7449 44.0484
+\i (00:00:16) trapsize 16037
+\i (00:00:16) zoom out 1 
+\i (00:00:16) setwindow pcb
+\i (00:00:16) zoom out 37.2732 25.7668
+\i (00:00:16) trapsize 32073
+\i (00:00:16) zoom out 1 
+\i (00:00:16) setwindow pcb
+\i (00:00:16) zoom out 173.2635 25.1253
+\i (00:00:16) trapsize 64146
+\i (00:00:16) zoom out 1 
+\i (00:00:16) setwindow pcb
+\i (00:00:16) zoom out 413.1708 40.5204
+\i (00:00:16) trapsize 128293
+\i (00:00:16) zoom out 1 
+\i (00:00:16) setwindow pcb
+\i (00:00:16) zoom out 859.6295 35.3887
+\i (00:00:16) trapsize 256585
+\i (00:00:17) zoom out 1 
+\i (00:00:17) setwindow pcb
+\i (00:00:17) zoom out 402.9074 158.5498
+\i (00:00:17) trapsize 513171
+\i (00:00:17) zoom out 1 
+\i (00:00:17) setwindow pcb
+\i (00:00:17) zoom out 895.5514 382.3806
+\i (00:00:17) trapsize 723589
+\i (00:00:17) zoom out 1 
+\i (00:00:17) setwindow pcb
+\i (00:00:17) zoom out 1303.7627 580.1737
+\i (00:00:17) trapsize 723589
+\i (00:00:18) zoom in 1 
+\i (00:00:18) setwindow pcb
+\i (00:00:18) zoom in 30.2460 -56.5847
+\i (00:00:18) trapsize 361795
+\i (00:00:18) zoom in 1 
+\i (00:00:18) setwindow pcb
+\i (00:00:18) zoom in 30.2460 -56.5846
+\i (00:00:18) trapsize 180897
+\i (00:00:18) zoom in 1 
+\i (00:00:18) setwindow pcb
+\i (00:00:18) zoom in 30.2460 -56.5846
+\i (00:00:18) trapsize 90449
+\i (00:00:18) zoom in 1 
+\i (00:00:18) setwindow pcb
+\i (00:00:18) zoom in 28.4371 -60.2025
+\i (00:00:18) trapsize 45224
+\i (00:00:18) zoom out 1 
+\i (00:00:18) setwindow pcb
+\i (00:00:18) zoom out 24.8191 -9.5513
+\i (00:00:18) trapsize 90449
+\i (00:00:18) zoom out 1 
+\i (00:00:18) setwindow pcb
+\i (00:00:18) zoom out 32.0551 1.3025
+\i (00:00:18) trapsize 180897
+\i (00:00:19) zoom out 1 
+\i (00:00:19) setwindow pcb
+\i (00:00:19) zoom out 17.5833 59.1896
+\i (00:00:19) trapsize 361795
+\i (00:00:19) zoom out 1 
+\i (00:00:19) setwindow pcb
+\i (00:00:19) zoom out 10.3474 211.1433
+\i (00:00:19) trapsize 723589
+\i (00:00:19) zoom in 1 
+\i (00:00:19) setwindow pcb
+\i (00:00:19) zoom in -13.1693 15.7742
+\i (00:00:19) trapsize 361795
+\i (00:00:20) zoom in 1 
+\i (00:00:20) setwindow pcb
+\i (00:00:20) zoom in -13.1693 15.7742
+\i (00:00:20) trapsize 180897
+\i (00:00:20) zoom in 1 
+\i (00:00:20) setwindow pcb
+\i (00:00:20) zoom in -13.1692 15.7743
+\i (00:00:20) trapsize 90449
+\i (00:00:21) zoom out 1 
+\i (00:00:21) setwindow pcb
+\i (00:00:21) zoom out 3.1116 1.3025
+\i (00:00:21) trapsize 180897
+\i (00:00:21) zoom out 1 
+\i (00:00:21) setwindow pcb
+\i (00:00:21) zoom out 3.1116 15.7743
+\i (00:00:21) trapsize 361795
+\i (00:00:21) zoom out 1 
+\i (00:00:21) setwindow pcb
+\i (00:00:21) zoom out 15.7742 15.7743
+\i (00:00:21) trapsize 723589
+\i (00:00:22) zoom in 1 
+\i (00:00:22) setwindow pcb
+\i (00:00:22) zoom in 1.3025 -42.1129
+\i (00:00:22) trapsize 361795
+\i (00:00:22) zoom in 1 
+\i (00:00:22) setwindow pcb
+\i (00:00:22) zoom in 1.3025 -42.1128
+\i (00:00:22) trapsize 180897
+\i (00:00:23) zoom in 1 
+\i (00:00:23) setwindow pcb
+\i (00:00:23) zoom in 1.3025 -24.0231
+\i (00:00:23) trapsize 90449
+\i (00:00:23) zoom in 1 
+\i (00:00:23) setwindow pcb
+\i (00:00:23) zoom in 1.3025 -24.0230
+\i (00:00:23) trapsize 45224
+\i (00:00:24) zoom in 1 
+\i (00:00:24) setwindow pcb
+\i (00:00:24) zoom in 4.0160 1.3026
+\i (00:00:24) trapsize 22612
+\i (00:00:24) zoom out 1 
+\i (00:00:24) setwindow pcb
+\i (00:00:24) zoom out 3.5638 28.4372
+\i (00:00:24) trapsize 45224
+\i (00:00:24) zoom out 1 
+\i (00:00:24) setwindow pcb
+\i (00:00:24) zoom out -1.8631 25.7237
+\i (00:00:24) trapsize 90449
+\i (00:00:25) zoom in 1 
+\i (00:00:25) setwindow pcb
+\i (00:00:25) zoom in -7.2901 53.7627
+\i (00:00:25) trapsize 45224
+\i (00:00:25) zoom in 1 
+\i (00:00:25) setwindow pcb
+\i (00:00:25) zoom in -2.7677 50.1448
+\i (00:00:25) trapsize 22612
+\i (00:00:25) zoom in 1 
+\i (00:00:25) setwindow pcb
+\i (00:00:25) zoom in -2.7677 50.1448
+\i (00:00:25) trapsize 11306
+\i (00:00:25) zoom in 1 
+\i (00:00:25) setwindow pcb
+\i (00:00:25) zoom in -2.7677 50.1448
+\i (00:00:25) trapsize 5653
+\i (00:00:26) zoom out 1 
+\i (00:00:26) setwindow pcb
+\i (00:00:26) zoom out 25.1583 52.9713
+\i (00:00:26) trapsize 11306
+\i (00:00:27) zoom out 1 
+\i (00:00:27) setwindow pcb
+\i (00:00:27) zoom out 13.8523 41.6653
+\i (00:00:27) trapsize 22612
+\i (00:00:27) zoom out 1 
+\i (00:00:27) setwindow pcb
+\i (00:00:27) zoom out 12.9477 40.7608
+\i (00:00:27) trapsize 45224
+\i (00:00:27) zoom in 1 
+\i (00:00:27) setwindow pcb
+\i (00:00:27) zoom in 19.3922 20.8622
+\i (00:00:27) trapsize 22612
+\i (00:00:28) zoom in 1 
+\i (00:00:28) setwindow pcb
+\i (00:00:28) zoom in 22.5579 11.3651
+\i (00:00:28) trapsize 11306
+\i (00:00:28) zoom in 1 
+\i (00:00:28) setwindow pcb
+\i (00:00:28) zoom in 22.5579 11.3651
+\i (00:00:28) trapsize 5653
+\i (00:00:28) zoom in 1 
+\i (00:00:28) setwindow pcb
+\i (00:00:28) zoom in 22.5579 11.3652
+\i (00:00:28) trapsize 2827
+\i (00:00:29) zoom out 1 
+\i (00:00:29) setwindow pcb
+\i (00:00:29) zoom out 29.3416 34.6558
+\i (00:00:29) trapsize 5653
+\i (00:00:30) zoom in 1 
+\i (00:00:30) setwindow pcb
+\i (00:00:30) zoom in 27.5326 45.7357
+\i (00:00:30) trapsize 2827
+\i (00:00:30) zoom in 1 
+\i (00:00:30) setwindow pcb
+\i (00:00:30) zoom in 28.4936 46.3576
+\i (00:00:30) trapsize 1413
+\i (00:00:31) zoom in 1 
+\i (00:00:31) setwindow pcb
+\i (00:00:31) zoom in 28.4937 45.3400
+\i (00:00:31) trapsize 707
+\i (00:00:31) zoom in 1 
+\i (00:00:31) setwindow pcb
+\i (00:00:31) zoom in 28.4654 45.2977
+\i (00:00:31) trapsize 353
+\i (00:00:31) zoom out 1 
+\i (00:00:31) setwindow pcb
+\i (00:00:31) zoom out 29.2992 45.4531
+\i (00:00:31) trapsize 707
+\i (00:00:32) zoom out 1 
+\i (00:00:32) setwindow pcb
+\i (00:00:32) zoom out 29.2993 45.4108
+\i (00:00:32) trapsize 1413
+\i (00:00:32) zoom in 1 
+\i (00:00:32) setwindow pcb
+\i (00:00:32) zoom in 30.0341 47.7003
+\i (00:00:32) trapsize 707
+\i (00:00:32) zoom in 1 
+\i (00:00:32) setwindow pcb
+\i (00:00:32) zoom in 30.0341 47.7003
+\i (00:00:32) trapsize 353
+\i (00:00:33) zoom out 1 
+\i (00:00:33) setwindow pcb
+\i (00:00:33) zoom out 29.7868 46.8523
+\i (00:00:33) trapsize 707
+\i (00:00:33) zoom out 1 
+\i (00:00:33) setwindow pcb
+\i (00:00:33) zoom out 29.7869 46.8524
+\i (00:00:33) trapsize 1413
+\i (00:00:33) zoom in 1 
+\i (00:00:33) setwindow pcb
+\i (00:00:33) zoom in 29.4194 39.9840
+\i (00:00:33) trapsize 707
+\i (00:00:33) zoom in 1 
+\i (00:00:33) setwindow pcb
+\i (00:00:33) zoom in 29.4336 40.3232
+\i (00:00:33) trapsize 353
+\i (00:00:34) zoom out 1 
+\i (00:00:34) setwindow pcb
+\i (00:00:34) zoom out 29.5396 40.5988
+\i (00:00:34) trapsize 707
+\i (00:00:34) zoom out 1 
+\i (00:00:34) setwindow pcb
+\i (00:00:34) zoom out 29.8506 42.9449
+\i (00:00:34) trapsize 1413
+\i (00:00:34) zoom out 1 
+\i (00:00:34) setwindow pcb
+\i (00:00:34) zoom out 29.8506 42.9448
+\i (00:00:34) trapsize 2827
+\i (00:00:35) zoom in 1 
+\i (00:00:35) setwindow pcb
+\i (00:00:35) zoom in 30.6985 48.5414
+\i (00:00:35) trapsize 1413
+\i (00:00:35) zoom in 1 
+\i (00:00:35) setwindow pcb
+\i (00:00:35) zoom in 30.6985 48.5414
+\i (00:00:35) trapsize 707
+\i (00:00:35) zoom in 1 
+\i (00:00:35) setwindow pcb
+\i (00:00:35) zoom in 30.1191 48.5697
+\i (00:00:35) trapsize 353
+\i (00:00:36) zoom out 1 
+\i (00:00:36) setwindow pcb
+\i (00:00:36) zoom out 29.5962 48.0963
+\i (00:00:36) trapsize 707
+\i (00:00:36) zoom in 1 
+\i (00:00:36) setwindow pcb
+\i (00:00:36) zoom in 29.6811 44.6762
+\i (00:00:36) trapsize 353
+\i (00:00:37) zoom in 1 
+\i (00:00:37) setwindow pcb
+\i (00:00:37) zoom in 29.8154 44.8741
+\i (00:00:37) trapsize 177
+\i (00:00:37) zoom out 1 
+\i (00:00:37) setwindow pcb
+\i (00:00:37) zoom out 29.8154 44.8918
+\i (00:00:37) trapsize 353
+\i (00:00:37) zoom out 1 
+\i (00:00:37) setwindow pcb
+\i (00:00:37) zoom out 29.8013 44.8918
+\i (00:00:37) trapsize 707
+\i (00:00:37) zoom out 1 
+\i (00:00:37) setwindow pcb
+\i (00:00:37) zoom out 29.6741 45.0756
+\i (00:00:37) trapsize 1413
+\i (00:00:37) zoom out 1 
+\i (00:00:37) setwindow pcb
+\i (00:00:37) zoom out 29.6740 45.0756
+\i (00:00:37) trapsize 2827
+\i (00:00:38) zoom out 1 
+\i (00:00:38) setwindow pcb
+\i (00:00:38) zoom out 29.6741 45.5278
+\i (00:00:38) trapsize 5653
+\i (00:00:38) zoom in 1 
+\i (00:00:38) setwindow pcb
+\i (00:00:38) zoom in 29.6741 45.5277
+\i (00:00:38) trapsize 2827
+\i (00:00:38) zoom in 1 
+\i (00:00:38) setwindow pcb
+\i (00:00:38) zoom in 29.6741 45.3016
+\i (00:00:38) trapsize 1413
+\i (00:00:38) zoom in 1 
+\i (00:00:38) setwindow pcb
+\i (00:00:38) zoom in 29.7024 45.6973
+\i (00:00:38) trapsize 707
+\i (00:00:39) zoom in 1 
+\i (00:00:39) setwindow pcb
+\i (00:00:39) zoom in 29.5187 45.9376
+\i (00:00:39) trapsize 353
+\i (00:00:39) zoom in 1 
+\i (00:00:39) setwindow pcb
+\i (00:00:39) zoom in 29.5328 45.9023
+\i (00:00:39) trapsize 177
+\i (00:00:39) zoom out 1 
+\i (00:00:39) setwindow pcb
+\i (00:00:39) zoom out 29.6671 45.7186
+\i (00:00:39) trapsize 353
+\i (00:00:40) zoom out 1 
+\i (00:00:40) setwindow pcb
+\i (00:00:40) zoom out 29.9426 44.7011
+\i (00:00:40) trapsize 707
+\i (00:00:41) zoom out 1 
+\i (00:00:41) setwindow pcb
+\i (00:00:41) zoom out 29.6317 43.7825
+\i (00:00:41) trapsize 1413
+\i (00:00:41) zoom out 1 
+\i (00:00:41) setwindow pcb
+\i (00:00:41) zoom out 30.3384 42.8214
+\i (00:00:41) trapsize 2827
+\i (00:00:41) zoom out 1 
+\i (00:00:41) setwindow pcb
+\i (00:00:41) zoom out 30.1688 42.7083
+\i (00:00:41) trapsize 5653
+\i (00:00:41) zoom out 1 
+\i (00:00:41) setwindow pcb
+\i (00:00:41) zoom out 30.1689 42.7083
+\i (00:00:41) trapsize 11306
+\i (00:00:42) zoom out 1 
+\i (00:00:42) setwindow pcb
+\i (00:00:42) zoom out 26.0987 42.4822
+\i (00:00:42) trapsize 22612
+\i (00:00:42) zoom out 1 
+\i (00:00:42) setwindow pcb
+\i (00:00:42) zoom out 54.2149 41.5778
+\i (00:00:42) trapsize 45224
+\i (00:00:42) zoom out 1 
+\i (00:00:42) setwindow pcb
+\i (00:00:42) zoom out 208.4298 45.1957
+\i (00:00:42) trapsize 90449
+\i (00:00:42) zoom in 1 
+\i (00:00:42) setwindow pcb
+\i (00:00:42) zoom in 10.3473 3.5893
+\i (00:00:42) trapsize 45224
+\i (00:00:42) zoom in 1 
+\i (00:00:42) setwindow pcb
+\i (00:00:42) zoom in 10.3474 3.5893
+\i (00:00:42) trapsize 22612
+\i (00:00:42) zoom in 1 
+\i (00:00:42) setwindow pcb
+\i (00:00:42) zoom in 10.3474 3.5893
+\i (00:00:42) trapsize 11306
+\i (00:00:43) zoom in 1 
+\i (00:00:43) setwindow pcb
+\i (00:00:43) zoom in 10.3474 3.5894
+\i (00:00:43) trapsize 5653
+\i (00:00:43) zoom in 1 
+\i (00:00:43) setwindow pcb
+\i (00:00:43) zoom in 10.3474 3.5894
+\i (00:00:43) trapsize 2827
+\i (00:00:44) zoom out 1 
+\i (00:00:44) setwindow pcb
+\i (00:00:44) zoom out 12.0434 18.1178
+\i (00:00:44) trapsize 5653
+\i (00:00:44) zoom out 1 
+\i (00:00:44) setwindow pcb
+\i (00:00:44) zoom out 12.0433 18.0046
+\i (00:00:44) trapsize 11306
+\i (00:00:44) zoom in 1 
+\i (00:00:44) setwindow pcb
+\i (00:00:44) zoom in 19.0531 53.5058
+\i (00:00:44) trapsize 5653
+\i (00:00:45) zoom in 1 
+\i (00:00:45) setwindow pcb
+\i (00:00:45) zoom in 27.1935 45.5915
+\i (00:00:45) trapsize 2827
+\i (00:00:45) zoom in 1 
+\i (00:00:45) setwindow pcb
+\i (00:00:45) zoom in 27.1935 45.5916
+\i (00:00:45) trapsize 1413
+\i (00:00:46) zoom in 1 
+\i (00:00:46) setwindow pcb
+\i (00:00:46) zoom in 28.7481 45.3089
+\i (00:00:46) trapsize 707
+\i (00:03:01) zoom out 1 
+\i (00:03:01) setwindow pcb
+\i (00:03:01) zoom out 30.9669 43.6271
+\i (00:03:01) trapsize 1413
+\i (00:03:01) zoom out 1 
+\i (00:03:01) setwindow pcb
+\i (00:03:01) zoom out 30.6561 43.0619
+\i (00:03:01) trapsize 2827
+\i (00:03:01) zoom out 1 
+\i (00:03:01) setwindow pcb
+\i (00:03:01) zoom out 30.0342 41.6486
+\i (00:03:01) trapsize 5653
+\i (00:03:02) zoom in 1 
+\i (00:03:02) setwindow pcb
+\i (00:03:02) zoom in 14.8840 27.2898
+\i (00:03:02) trapsize 2827
+\i (00:03:02) zoom in 1 
+\i (00:03:02) setwindow pcb
+\i (00:03:02) zoom in 14.8840 27.2898
+\i (00:03:02) trapsize 1413
+\i (00:03:03) zoom out 1 
+\i (00:03:03) setwindow pcb
+\i (00:03:03) zoom out 15.1667 26.6680
+\i (00:03:03) trapsize 2827
+\i (00:03:03) zoom out 1 
+\i (00:03:03) setwindow pcb
+\i (00:03:03) zoom out 17.1452 27.7987
+\i (00:03:03) trapsize 5653
+\i (00:03:03) zoom out 1 
+\i (00:03:03) setwindow pcb
+\i (00:03:03) zoom out 17.1451 27.7986
+\i (00:03:03) trapsize 11306
+\i (00:03:06) zoom in 1 
+\i (00:03:06) setwindow pcb
+\i (00:03:06) zoom in 15.3362 29.1554
+\i (00:03:06) trapsize 5653
+\i (00:03:06) zoom in 1 
+\i (00:03:06) setwindow pcb
+\i (00:03:06) zoom in 15.5624 28.4770
+\i (00:03:06) trapsize 2827
+\i (00:03:06) zoom in 1 
+\i (00:03:06) setwindow pcb
+\i (00:03:06) zoom in 18.1062 28.3075
+\i (00:03:06) trapsize 1413
+\i (00:03:06) zoom in 1 
+\i (00:03:06) setwindow pcb
+\i (00:03:06) zoom in 18.2476 28.4489
+\i (00:03:06) trapsize 707
+\i (00:03:07) zoom out 1 
+\i (00:03:07) setwindow pcb
+\i (00:03:07) zoom out 18.9684 29.2686
+\i (00:03:07) trapsize 1413
+\i (00:03:07) zoom out 1 
+\i (00:03:07) setwindow pcb
+\i (00:03:07) zoom out 18.9684 29.2686
+\i (00:03:07) trapsize 2827
+\i (00:03:07) zoom out 1 
+\i (00:03:07) setwindow pcb
+\i (00:03:07) zoom out 21.1731 31.2472
+\i (00:03:07) trapsize 5653
+\i (00:03:08) zoom in 1 
+\i (00:03:08) setwindow pcb
+\i (00:03:08) zoom in 22.6430 41.1966
+\i (00:03:08) trapsize 2827
+\i (00:03:08) zoom in 1 
+\i (00:03:08) setwindow pcb
+\i (00:03:08) zoom in 24.7347 41.9315
+\i (00:03:08) trapsize 1413
+\i (00:03:09) zoom in 1 
+\i (00:03:09) setwindow pcb
+\i (00:03:09) zoom in 26.5154 42.4403
+\i (00:03:09) trapsize 707
+\i (00:03:09) zoom in 1 
+\i (00:03:09) setwindow pcb
+\i (00:03:09) zoom in 28.7202 42.9632
+\i (00:03:09) trapsize 353
+\i (00:03:10) zoom in 1 
+\i (00:03:10) setwindow pcb
+\i (00:03:10) zoom in 29.7448 42.5816
+\i (00:03:10) trapsize 177
+\i (00:03:10) zoom out 1 
+\i (00:03:10) setwindow pcb
+\i (00:03:10) zoom out 29.7130 42.5569
+\i (00:03:10) trapsize 353
+\i (00:03:17) zoom in 1 
+\i (00:03:17) setwindow pcb
+\i (00:03:17) zoom in 29.8615 43.1151
+\i (00:03:17) trapsize 177
+\i (00:03:17) zoom in 1 
+\i (00:03:17) setwindow pcb
+\i (00:03:17) zoom in 29.8615 43.1151
+\i (00:03:17) trapsize 88
+\i (00:03:17) zoom in 1 
+\i (00:03:17) setwindow pcb
+\i (00:03:17) zoom in 29.8615 43.1151
+\i (00:03:17) trapsize 44
+\i (00:03:17) zoom in 1 
+\i (00:03:17) setwindow pcb
+\i (00:03:17) zoom in 29.8615 43.1151
+\i (00:03:17) trapsize 22
+\i (00:03:17) zoom out 1 
+\i (00:03:17) setwindow pcb
+\i (00:03:17) zoom out 29.8606 43.1151
+\i (00:03:17) trapsize 44
+\i (00:03:17) zoom out 1 
+\i (00:03:17) setwindow pcb
+\i (00:03:17) zoom out 29.8526 43.1151
+\i (00:03:17) trapsize 88
+\i (00:03:17) zoom out 1 
+\i (00:03:17) setwindow pcb
+\i (00:03:17) zoom out 29.8525 43.1151
+\i (00:03:17) trapsize 177
+\i (00:03:17) zoom in 1 
+\i (00:03:17) setwindow pcb
+\i (00:03:17) zoom in 29.8525 43.1151
+\i (00:03:17) trapsize 88
+\i (00:03:17) zoom out 1 
+\i (00:03:17) setwindow pcb
+\i (00:03:17) zoom out 29.8525 43.1151
+\i (00:03:17) trapsize 177
+\i (00:03:18) zoom out 1 
+\i (00:03:18) setwindow pcb
+\i (00:03:18) zoom out 29.5840 43.1469
+\i (00:03:18) trapsize 353
+\i (00:03:18) zoom out 1 
+\i (00:03:18) setwindow pcb
+\i (00:03:18) zoom out 29.5841 43.1468
+\i (00:03:18) trapsize 707
+\i (00:03:19) zoom out 1 
+\i (00:03:19) setwindow pcb
+\i (00:03:19) zoom out 29.5841 43.1468
+\i (00:03:19) trapsize 1413
+\i (00:03:19) zoom in 1 
+\i (00:03:19) setwindow pcb
+\i (00:03:19) zoom in 29.0188 48.5735
+\i (00:03:19) trapsize 707
+\i (00:03:20) zoom in 1 
+\i (00:03:20) setwindow pcb
+\i (00:03:20) zoom in 29.1036 48.5736
+\i (00:03:20) trapsize 353
+\i (00:03:20) zoom out 1 
+\i (00:03:20) setwindow pcb
+\i (00:03:20) zoom out 29.8244 48.1284
+\i (00:03:20) trapsize 707
+\i (00:03:20) zoom out 1 
+\i (00:03:20) setwindow pcb
+\i (00:03:20) zoom out 29.8102 48.1002
+\i (00:03:20) trapsize 1413
+\i (00:03:20) zoom out 1 
+\i (00:03:20) setwindow pcb
+\i (00:03:20) zoom out 29.7820 47.9871
+\i (00:03:20) trapsize 2826
+\i (00:03:20) zoom out 1 
+\i (00:03:20) setwindow pcb
+\i (00:03:20) zoom out 25.5425 39.1688
+\i (00:03:20) trapsize 5653
+\i (00:03:20) zoom out 1 
+\i (00:03:20) setwindow pcb
+\i (00:03:20) zoom out 25.5424 38.2643
+\i (00:03:20) trapsize 11306
+\i (00:03:21) zoom in 1 
+\i (00:03:21) setwindow pcb
+\i (00:03:21) zoom in 14.8648 24.0193
+\i (00:03:21) trapsize 5653
+\i (00:03:21) zoom in 1 
+\i (00:03:21) setwindow pcb
+\i (00:03:21) zoom in 14.8648 24.0193
+\i (00:03:21) trapsize 2826
+\i (00:03:22) zoom in 1 
+\i (00:03:22) setwindow pcb
+\i (00:03:22) zoom in 13.3385 30.3504
+\i (00:03:22) trapsize 1413
+\i (00:03:22) zoom in 1 
+\i (00:03:22) setwindow pcb
+\i (00:03:22) zoom in 13.5929 30.4918
+\i (00:03:22) trapsize 707
+\i (00:03:22) zoom out 1 
+\i (00:03:22) setwindow pcb
+\i (00:03:22) zoom out 14.0169 31.5235
+\i (00:03:22) trapsize 1413
+\i (00:03:22) zoom out 1 
+\i (00:03:22) setwindow pcb
+\i (00:03:22) zoom out 14.0170 31.4952
+\i (00:03:22) trapsize 2826
+\i (00:03:22) zoom out 1 
+\i (00:03:22) setwindow pcb
+\i (00:03:22) zoom out 14.1865 30.8734
+\i (00:03:22) trapsize 5653
+\i (00:03:22) zoom out 1 
+\i (00:03:22) setwindow pcb
+\i (00:03:22) zoom out 14.4126 30.5342
+\i (00:03:22) trapsize 11306
+\i (00:03:23) zoom in 1 
+\i (00:03:23) setwindow pcb
+\i (00:03:23) zoom in 19.3871 42.0659
+\i (00:03:23) trapsize 5653
+\i (00:03:23) zoom in 1 
+\i (00:03:23) setwindow pcb
+\i (00:03:23) zoom in 19.1610 41.3876
+\i (00:03:23) trapsize 2826
+\i (00:03:24) zoom in 1 
+\i (00:03:24) setwindow pcb
+\i (00:03:24) zoom in 19.7263 38.7308
+\i (00:03:24) trapsize 1413
+\i (00:03:29) zoom out 1 
+\i (00:03:29) setwindow pcb
+\i (00:03:29) zoom out 30.6079 43.8749
+\i (00:03:29) trapsize 2826
+\i (00:03:29) zoom out 1 
+\i (00:03:29) setwindow pcb
+\i (00:03:29) zoom out 30.6079 43.8749
+\i (00:03:29) trapsize 5653
+\i (00:03:30) zoom in 1 
+\i (00:03:30) setwindow pcb
+\i (00:03:30) zoom in 34.5649 51.5628
+\i (00:03:30) trapsize 2826
+\i (00:03:30) zoom in 1 
+\i (00:03:30) setwindow pcb
+\i (00:03:30) zoom in 34.5649 51.5628
+\i (00:03:30) trapsize 1413
+\i (00:03:31) zoom in 1 
+\i (00:03:31) setwindow pcb
+\i (00:03:31) zoom in 30.4949 47.8885
+\i (00:03:31) trapsize 707
+\i (00:03:31) zoom in 1 
+\i (00:03:31) setwindow pcb
+\i (00:03:31) zoom in 30.1699 47.6342
+\i (00:03:31) trapsize 353
+\i (00:03:31) zoom in 1 
+\i (00:03:31) setwindow pcb
+\i (00:03:31) zoom in 30.1699 47.6342
+\i (00:03:31) trapsize 177
+\i (00:03:32) zoom out 1 
+\i (00:03:32) setwindow pcb
+\i (00:03:32) zoom out 30.1593 47.5812
+\i (00:03:32) trapsize 353
+\i (00:03:32) zoom out 1 
+\i (00:03:32) setwindow pcb
+\i (00:03:32) zoom out 30.1523 47.5600
+\i (00:03:32) trapsize 707
+\i (00:04:44) zoom out 1 
+\i (00:04:44) setwindow pcb
+\i (00:04:44) zoom out 24.4713 44.8467
+\i (00:04:44) trapsize 1413
+\i (00:04:45) zoom out 1 
+\i (00:04:45) setwindow pcb
+\i (00:04:45) zoom out 24.1886 45.2141
+\i (00:04:45) trapsize 2826
+\i (00:04:45) zoom out 1 
+\i (00:04:45) setwindow pcb
+\i (00:04:45) zoom out 24.1320 45.2141
+\i (00:04:45) trapsize 5653
+\i (00:04:45) zoom in 1 
+\i (00:04:45) setwindow pcb
+\i (00:04:45) zoom in 19.3836 42.7268
+\i (00:04:45) trapsize 2826
+\i (00:04:46) zoom in 1 
+\i (00:04:46) setwindow pcb
+\i (00:04:46) zoom in 19.2706 41.4267
+\i (00:04:46) trapsize 1413
+\i (00:04:46) zoom in 1 
+\i (00:04:46) setwindow pcb
+\i (00:04:46) zoom in 33.0634 45.1858
+\i (00:04:46) trapsize 707
+\i (00:04:47) zoom in 1 
+\i (00:04:47) setwindow pcb
+\i (00:04:47) zoom in 33.0634 45.1858
+\i (00:04:47) trapsize 353
+\i (00:04:47) zoom out 1 
+\i (00:04:47) setwindow pcb
+\i (00:04:47) zoom out 31.0920 45.7581
+\i (00:04:47) trapsize 707
+\i (00:04:47) zoom out 1 
+\i (00:04:47) setwindow pcb
+\i (00:04:47) zoom out 31.0921 45.7582
+\i (00:04:47) trapsize 1413
+\i (00:04:48) zoom in 1 
+\i (00:04:48) setwindow pcb
+\i (00:04:48) zoom in 28.0678 48.5563
+\i (00:04:48) trapsize 707
+\i (00:04:48) zoom in 1 
+\i (00:04:48) setwindow pcb
+\i (00:04:48) zoom in 27.3047 48.6694
+\i (00:04:48) trapsize 353
+\i (00:06:16) zoom out 1 
+\i (00:06:16) setwindow pcb
+\i (00:06:16) zoom out 29.7001 47.4399
+\i (00:06:16) trapsize 707
+\i (00:06:16) zoom in 1 
+\i (00:06:16) setwindow pcb
+\i (00:06:16) zoom in 29.7001 47.4400
+\i (00:06:16) trapsize 353
+\i (00:06:16) zoom out 1 
+\i (00:06:16) setwindow pcb
+\i (00:06:16) zoom out 29.7001 47.4400
+\i (00:06:16) trapsize 707
+\i (00:06:16) zoom out 1 
+\i (00:06:16) setwindow pcb
+\i (00:06:16) zoom out 29.7001 47.4401
+\i (00:06:16) trapsize 1413
+\i (00:06:16) zoom in 1 
+\i (00:06:16) setwindow pcb
+\i (00:06:16) zoom in 27.1845 45.6029
+\i (00:06:16) trapsize 707
+\i (00:06:16) zoom in 1 
+\i (00:06:16) setwindow pcb
+\i (00:06:16) zoom in 27.4248 45.7018
+\i (00:06:16) trapsize 353
+\i (00:06:16) zoom in 1 
+\i (00:06:16) setwindow pcb
+\i (00:06:16) zoom in 27.5803 45.9774
+\i (00:06:16) trapsize 177
+\i (00:06:17) zoom out 1 
+\i (00:06:17) setwindow pcb
+\i (00:06:17) zoom out 28.9829 45.9774
+\i (00:06:17) trapsize 353
+\i (00:06:17) zoom out 1 
+\i (00:06:17) setwindow pcb
+\i (00:06:17) zoom out 28.9971 45.9775
+\i (00:06:17) trapsize 707
+\i (00:06:17) zoom in 1 
+\i (00:06:17) setwindow pcb
+\i (00:06:17) zoom in 30.6506 47.9277
+\i (00:06:17) trapsize 353
+\i (00:06:17) zoom in 1 
+\i (00:06:17) setwindow pcb
+\i (00:06:17) zoom in 30.6506 47.9347
+\i (00:06:17) trapsize 177
+\i (00:06:18) zoom out 1 
+\i (00:06:18) setwindow pcb
+\i (00:06:18) zoom out 30.1596 48.0372
+\i (00:06:18) trapsize 353
+\i (00:07:57) zoom out 1 
+\i (00:07:57) setwindow pcb
+\i (00:07:57) zoom out 26.9728 45.2108
+\i (00:07:57) trapsize 707
+\i (00:07:57) zoom out 1 
+\i (00:07:57) setwindow pcb
+\i (00:07:57) zoom out 26.9728 45.2107
+\i (00:07:57) trapsize 1413
+\i (00:11:49) zoom out 1 
+\i (00:11:49) setwindow pcb
+\i (00:11:49) zoom out 18.6067 51.6549
+\i (00:11:49) trapsize 2826
+\i (00:11:49) zoom in 1 
+\i (00:11:49) setwindow pcb
+\i (00:11:49) zoom in 18.1544 50.8071
+\i (00:11:49) trapsize 1413
+\i (00:11:49) zoom out 1 
+\i (00:11:49) setwindow pcb
+\i (00:11:49) zoom out 18.1545 50.8071
+\i (00:11:49) trapsize 2826
+\i (00:11:49) zoom out 1 
+\i (00:11:49) setwindow pcb
+\i (00:11:49) zoom out 18.0979 50.6375
+\i (00:11:49) trapsize 5653
+\i (00:11:49) zoom out 1 
+\i (00:11:49) setwindow pcb
+\i (00:11:49) zoom out 17.5326 52.4464
+\i (00:11:49) trapsize 11306
+\i (00:11:50) zoom in 1 
+\i (00:11:50) setwindow pcb
+\i (00:11:50) zoom in -8.6964 92.6943
+\i (00:11:50) trapsize 5653
+\i (00:11:50) zoom in 1 
+\i (00:11:50) setwindow pcb
+\i (00:11:50) zoom in -9.4878 93.4857
+\i (00:11:50) trapsize 2826
+\i (00:11:50) zoom in 1 
+\i (00:11:50) setwindow pcb
+\i (00:11:50) zoom in -9.6008 93.5988
+\i (00:11:50) trapsize 1413
+\i (00:11:50) zoom out 1 
+\i (00:11:50) setwindow pcb
+\i (00:11:50) zoom out 5.9161 87.2394
+\i (00:11:50) trapsize 2826
+\i (00:11:50) zoom out 1 
+\i (00:11:50) setwindow pcb
+\i (00:11:50) zoom out 5.9726 86.9002
+\i (00:11:50) trapsize 5653
+\i (00:11:51) zoom in 1 
+\i (00:11:51) setwindow pcb
+\i (00:11:51) zoom in 13.9996 86.7872
+\i (00:11:51) trapsize 2826
+\i (00:11:51) zoom in 1 
+\i (00:11:51) setwindow pcb
+\i (00:11:51) zoom in 14.3388 87.6916
+\i (00:11:51) trapsize 1413
+\i (00:11:51) zoom in 1 
+\i (00:11:51) setwindow pcb
+\i (00:11:51) zoom in 13.7170 87.9178
+\i (00:11:51) trapsize 707
+\i (00:11:51) zoom out 1 
+\i (00:11:51) setwindow pcb
+\i (00:11:51) zoom out 8.3328 90.2778
+\i (00:11:51) trapsize 1413
+\i (00:11:52) zoom out 1 
+\i (00:11:52) setwindow pcb
+\i (00:11:52) zoom out 8.3610 90.2496
+\i (00:11:52) trapsize 2826
+\i (00:11:52) zoom in 1 
+\i (00:11:52) setwindow pcb
+\i (00:11:52) zoom in 8.1914 95.0545
+\i (00:11:52) trapsize 1413
+\i (00:11:52) zoom in 1 
+\i (00:11:52) setwindow pcb
+\i (00:11:52) zoom in 7.9653 94.7719
+\i (00:11:52) trapsize 707
+\i (00:11:52) zoom in 1 
+\i (00:11:52) setwindow pcb
+\i (00:11:52) zoom in 8.3893 94.1360
+\i (00:11:52) trapsize 353
+\i (00:11:53) zoom in 1 
+\i (00:11:53) setwindow pcb
+\i (00:11:53) zoom in 9.9862 92.0304
+\i (00:11:53) trapsize 177
+\i (00:11:53) zoom out 1 
+\i (00:11:53) setwindow pcb
+\i (00:11:53) zoom out 9.5906 92.0374
+\i (00:11:53) trapsize 353
+\i (00:11:53) zoom out 1 
+\i (00:11:53) setwindow pcb
+\i (00:11:53) zoom out 9.5905 91.9951
+\i (00:11:53) trapsize 707
+\i (00:11:54) zoom in 1 
+\i (00:11:54) setwindow pcb
+\i (00:11:54) zoom in 9.8167 89.5220
+\i (00:11:54) trapsize 353
+\i (00:11:54) zoom in 1 
+\i (00:11:54) setwindow pcb
+\i (00:11:54) zoom in 9.8167 89.4161
+\i (00:11:54) trapsize 177
+\i (00:11:55) zoom out 1 
+\i (00:11:55) setwindow pcb
+\i (00:11:55) zoom out 9.6436 89.6210
+\i (00:11:55) trapsize 353
+\i (00:12:04) zoom out 1 
+\i (00:12:04) setwindow pcb
+\i (00:12:04) zoom out 9.8979 91.1402
+\i (00:12:04) trapsize 707
+\i (00:12:04) zoom out 1 
+\i (00:12:04) setwindow pcb
+\i (00:12:04) zoom out 9.8838 91.1402
+\i (00:12:04) trapsize 1413
+\i (00:12:04) zoom out 1 
+\i (00:12:04) setwindow pcb
+\i (00:12:04) zoom out 9.8838 91.1401
+\i (00:12:04) trapsize 2826
+\i (00:12:05) zoom out 1 
+\i (00:12:05) setwindow pcb
+\i (00:12:05) zoom out 10.8448 79.7215
+\i (00:12:05) trapsize 5653
+\i (00:12:05) zoom out 1 
+\i (00:12:05) setwindow pcb
+\i (00:12:05) zoom out 11.2970 79.4953
+\i (00:12:05) trapsize 11306
+\i (00:12:05) zoom in 1 
+\i (00:12:05) setwindow pcb
+\i (00:12:05) zoom in 5.8204 58.9192
+\i (00:12:05) trapsize 5653
+\i (00:12:06) zoom in 1 
+\i (00:12:06) setwindow pcb
+\i (00:12:06) zoom in 3.8984 65.3634
+\i (00:12:06) trapsize 2826
+\i (00:12:06) zoom in 1 
+\i (00:12:06) setwindow pcb
+\i (00:12:06) zoom in 8.1380 67.3419
+\i (00:12:06) trapsize 1413
+\i (00:12:07) zoom in 1 
+\i (00:12:07) setwindow pcb
+\i (00:12:07) zoom in 12.1798 69.3769
+\i (00:12:07) trapsize 707
+\i (00:12:07) zoom in 1 
+\i (00:12:07) setwindow pcb
+\i (00:12:07) zoom in 12.0667 71.0587
+\i (00:12:07) trapsize 353
+\i (00:12:57) zoom out 1 
+\i (00:12:57) setwindow pcb
+\i (00:12:57) zoom out 10.7948 71.5745
+\i (00:12:57) trapsize 707
+\i (00:12:57) zoom out 1 
+\i (00:12:57) setwindow pcb
+\i (00:12:57) zoom out 10.3851 71.3060
+\i (00:12:57) trapsize 1413
+\i (00:12:57) zoom out 1 
+\i (00:12:57) setwindow pcb
+\i (00:12:57) zoom out 9.9611 71.1081
+\i (00:12:57) trapsize 2826
+\i (00:12:58) zoom in 1 
+\i (00:12:58) setwindow pcb
+\i (00:12:58) zoom in 1.8210 67.8296
+\i (00:12:58) trapsize 1413
+\i (00:12:58) zoom in 1 
+\i (00:12:58) setwindow pcb
+\i (00:12:58) zoom in 1.7363 67.6600
+\i (00:12:58) trapsize 707
+\i (00:12:58) zoom in 1 
+\i (00:12:58) setwindow pcb
+\i (00:12:58) zoom in 1.8352 68.8188
+\i (00:12:58) trapsize 353
+\i (00:12:58) zoom in 1 
+\i (00:12:58) setwindow pcb
+\i (00:12:58) zoom in 1.8352 68.8189
+\i (00:12:58) trapsize 177
+\i (00:12:59) zoom out 1 
+\i (00:12:59) setwindow pcb
+\i (00:12:59) zoom out 2.6442 69.4195
+\i (00:12:59) trapsize 353
+\i (00:12:59) zoom out 1 
+\i (00:12:59) setwindow pcb
+\i (00:12:59) zoom out 2.6372 69.4054
+\i (00:12:59) trapsize 707
+\i (00:12:59) zoom out 1 
+\i (00:12:59) setwindow pcb
+\i (00:12:59) zoom out 3.3015 69.1794
+\i (00:12:59) trapsize 1413
+\i (00:12:59) zoom out 1 
+\i (00:12:59) setwindow pcb
+\i (00:12:59) zoom out 3.6407 68.3315
+\i (00:12:59) trapsize 2826
+\i (00:12:59) zoom out 1 
+\i (00:12:59) setwindow pcb
+\i (00:12:59) zoom out 3.6406 68.3315
+\i (00:12:59) trapsize 5653
+\i (00:13:00) zoom out 1 
+\i (00:13:00) setwindow pcb
+\i (00:13:00) zoom out 16.5290 88.2293
+\i (00:13:00) trapsize 11306
+\i (00:13:00) zoom in 1 
+\i (00:13:00) setwindow pcb
+\i (00:13:00) zoom in 57.1478 77.3761
+\i (00:13:00) trapsize 5653
+\i (00:13:00) zoom in 1 
+\i (00:13:00) setwindow pcb
+\i (00:13:00) zoom in 56.5825 75.4541
+\i (00:13:00) trapsize 2826
+\i (00:13:00) zoom in 1 
+\i (00:13:00) setwindow pcb
+\i (00:13:00) zoom in 56.2998 75.3410
+\i (00:13:00) trapsize 1413
+\i (00:13:00) zoom out 1 
+\i (00:13:00) setwindow pcb
+\i (00:13:00) zoom out 44.2876 74.6627
+\i (00:13:00) trapsize 2826
+\i (00:13:00) zoom out 1 
+\i (00:13:00) setwindow pcb
+\i (00:13:00) zoom out 44.2877 74.6628
+\i (00:13:00) trapsize 5653
+\i (00:13:00) zoom out 1 
+\i (00:13:00) setwindow pcb
+\i (00:13:00) zoom out 44.5137 73.5322
+\i (00:13:00) trapsize 11306
+\i (00:13:01) zoom in 1 
+\i (00:13:01) setwindow pcb
+\i (00:13:01) zoom in 3.3614 84.6117
+\i (00:13:01) trapsize 5653
+\i (00:13:01) zoom in 1 
+\i (00:13:01) setwindow pcb
+\i (00:13:01) zoom in 3.2483 84.6117
+\i (00:13:01) trapsize 2826
+\i (00:13:01) zoom in 1 
+\i (00:13:01) setwindow pcb
+\i (00:13:01) zoom in 3.1918 84.6118
+\i (00:13:01) trapsize 1413
+\i (00:13:02) zoom in 1 
+\i (00:13:02) setwindow pcb
+\i (00:13:02) zoom in 10.3143 72.6279
+\i (00:13:02) trapsize 707
+\i (00:13:02) zoom in 1 
+\i (00:13:02) setwindow pcb
+\i (00:13:02) zoom in 10.2720 72.2464
+\i (00:13:02) trapsize 353
+\i (00:13:03) zoom out 1 
+\i (00:13:03) setwindow pcb
+\i (00:13:03) zoom out 12.8722 72.1263
+\i (00:13:03) trapsize 707
+\i (00:13:06) zoom out 1 
+\i (00:13:06) setwindow pcb
+\i (00:13:06) zoom out 11.2613 74.0766
+\i (00:13:06) trapsize 1413
+\i (00:13:06) zoom out 1 
+\i (00:13:06) setwindow pcb
+\i (00:13:06) zoom out 9.4806 73.7374
+\i (00:13:06) trapsize 2826
+\i (00:13:06) zoom out 1 
+\i (00:13:06) setwindow pcb
+\i (00:13:06) zoom out 8.8589 73.5677
+\i (00:13:06) trapsize 5653
+\i (00:13:06) zoom out 1 
+\i (00:13:06) setwindow pcb
+\i (00:13:06) zoom out 6.5977 72.7764
+\i (00:13:06) trapsize 11306
+\i (00:13:07) zoom in 1 
+\i (00:13:07) setwindow pcb
+\i (00:13:07) zoom in -9.7814 89.2825
+\i (00:13:08) trapsize 5653
+\i (00:13:08) zoom in 1 
+\i (00:13:08) setwindow pcb
+\i (00:13:08) zoom in 9.6642 89.9609
+\i (00:13:08) trapsize 2826
+\i (00:13:08) zoom in 1 
+\i (00:13:08) setwindow pcb
+\i (00:13:08) zoom in 9.3251 89.2826
+\i (00:13:08) trapsize 1413
+\i (00:13:09) zoom in 1 
+\i (00:13:09) setwindow pcb
+\i (00:13:09) zoom in 11.5863 92.5895
+\i (00:13:09) trapsize 707
+\i (00:13:11) zoom in 1 
+\i (00:13:11) setwindow pcb
+\i (00:13:11) zoom in 10.4416 91.7558
+\i (00:13:11) trapsize 353
+\i (00:13:12) zoom out 1 
+\i (00:13:12) setwindow pcb
+\i (00:13:12) zoom out 9.7703 91.2188
+\i (00:13:12) trapsize 707
+\i (00:13:12) zoom out 1 
+\i (00:13:12) setwindow pcb
+\i (00:13:12) zoom out 9.7704 91.2188
+\i (00:13:12) trapsize 1413
+\i (00:13:16) zoom out 1 
+\i (00:13:16) setwindow pcb
+\i (00:13:16) zoom out 20.3411 87.6859
+\i (00:13:16) trapsize 2826
+\i (00:13:16) zoom out 1 
+\i (00:13:16) setwindow pcb
+\i (00:13:16) zoom out 20.5673 87.4597
+\i (00:13:16) trapsize 5653
+\i (00:13:16) zoom out 1 
+\i (00:13:16) setwindow pcb
+\i (00:13:16) zoom out 28.8203 77.8499
+\i (00:13:16) trapsize 11306
+\i (00:13:16) zoom out 1 
+\i (00:13:16) setwindow pcb
+\i (00:13:16) zoom out 108.0229 77.8500
+\i (00:13:16) trapsize 22611
+\i (00:13:17) zoom in 1 
+\i (00:13:17) setwindow pcb
+\i (00:13:17) zoom in 38.3805 37.1498
+\i (00:13:17) trapsize 11306
+\i (00:13:17) zoom in 1 
+\i (00:13:17) setwindow pcb
+\i (00:13:17) zoom in 38.1544 37.1498
+\i (00:13:17) trapsize 5653
+\i (00:13:19) zoom out 1 
+\i (00:13:19) setwindow pcb
+\i (00:13:19) zoom out 40.1895 53.5429
+\i (00:13:19) trapsize 11306
+\i (00:13:20) zoom in 1 
+\i (00:13:20) setwindow pcb
+\i (00:13:20) zoom in 25.2660 68.4663
+\i (00:13:20) trapsize 5653
+\i (00:13:20) zoom out 1 
+\i (00:13:20) setwindow pcb
+\i (00:13:20) zoom out 11.0209 73.6669
+\i (00:13:20) trapsize 11306
+\i (00:13:22) zoom in 1 
+\i (00:13:22) setwindow pcb
+\i (00:13:22) zoom in -14.7559 94.9214
+\i (00:13:22) trapsize 5653
+\i (00:13:22) zoom in 1 
+\i (00:13:22) setwindow pcb
+\i (00:13:22) zoom in -14.7558 94.8084
+\i (00:13:22) trapsize 2826
+\i (00:13:22) zoom in 1 
+\i (00:13:22) setwindow pcb
+\i (00:13:22) zoom in -14.7558 94.8084
+\i (00:13:22) trapsize 1413
+\i (00:13:23) zoom in 1 
+\i (00:13:23) setwindow pcb
+\i (00:13:23) zoom in 14.6670 89.9753
+\i (00:13:23) trapsize 707
+\i (00:13:23) zoom out 1 
+\i (00:13:23) setwindow pcb
+\i (00:13:23) zoom out 14.5823 89.9753
+\i (00:13:23) trapsize 1413
+\i (00:13:23) zoom out 1 
+\i (00:13:23) setwindow pcb
+\i (00:13:23) zoom out 14.5822 89.9754
+\i (00:13:23) trapsize 2826
+\i (00:13:24) zoom in 1 
+\i (00:13:24) setwindow pcb
+\i (00:13:24) zoom in 17.6912 90.6536
+\i (00:13:24) trapsize 1413
+\i (00:13:24) zoom in 1 
+\i (00:13:24) setwindow pcb
+\i (00:13:24) zoom in 11.4166 91.1058
+\i (00:13:24) trapsize 707
+\i (00:13:25) zoom in 1 
+\i (00:13:25) setwindow pcb
+\i (00:13:25) zoom in 10.4274 91.1200
+\i (00:13:25) trapsize 353
+\i (00:13:37) zoom out 1 
+\i (00:13:37) setwindow pcb
+\i (00:13:37) zoom out 7.3042 91.9679
+\i (00:13:37) trapsize 707
+\i (00:13:37) zoom out 1 
+\i (00:13:37) setwindow pcb
+\i (00:13:37) zoom out 7.3749 91.7842
+\i (00:13:37) trapsize 1413
+\i (00:13:38) zoom in 1 
+\i (00:13:38) setwindow pcb
+\i (00:13:38) zoom in 15.7128 90.5123
+\i (00:13:38) trapsize 707
+\i (00:13:38) zoom in 1 
+\i (00:13:38) setwindow pcb
+\i (00:13:38) zoom in 15.4585 90.2862
+\i (00:13:38) trapsize 353
+\i (00:13:39) zoom out 1 
+\i (00:13:39) setwindow pcb
+\i (00:13:39) zoom out 13.0278 90.6466
+\i (00:13:39) trapsize 707
+\i (00:13:59) zoom in 1 
+\i (00:13:59) setwindow pcb
+\i (00:13:59) zoom in 18.7796 87.8202
+\i (00:13:59) trapsize 353
+\i (00:13:59) zoom out 1 
+\i (00:13:59) setwindow pcb
+\i (00:13:59) zoom out 18.7796 87.8202
+\i (00:13:59) trapsize 707
+\i (00:14:18) zoom out 1 
+\i (00:14:18) setwindow pcb
+\i (00:14:18) zoom out 20.5178 89.3464
+\i (00:14:18) trapsize 1413
+\i (00:14:18) zoom out 1 
+\i (00:14:18) setwindow pcb
+\i (00:14:18) zoom out 20.5178 89.3464
+\i (00:14:18) trapsize 2826
+\i (00:14:18) zoom out 1 
+\i (00:14:18) setwindow pcb
+\i (00:14:18) zoom out 20.5178 89.3465
+\i (00:14:18) trapsize 5653
+\i (00:14:18) zoom out 1 
+\i (00:14:18) setwindow pcb
+\i (00:14:18) zoom out 20.5178 89.3464
+\i (00:14:18) trapsize 11306
+\i (00:14:19) zoom out 1 
+\i (00:14:19) setwindow pcb
+\i (00:14:19) zoom out 37.0238 62.2130
+\i (00:14:19) trapsize 22611
+\i (00:14:20) zoom in 1 
+\i (00:14:20) setwindow pcb
+\i (00:14:20) zoom in 17.1260 21.0606
+\i (00:14:20) trapsize 11306
+\i (00:14:20) zoom in 1 
+\i (00:14:20) setwindow pcb
+\i (00:14:20) zoom in 17.1260 20.8345
+\i (00:14:20) trapsize 5653
+\i (00:14:20) zoom in 1 
+\i (00:14:20) setwindow pcb
+\i (00:14:20) zoom in 17.1260 20.8346
+\i (00:14:20) trapsize 2826
+\i (00:14:20) zoom in 1 
+\i (00:14:20) setwindow pcb
+\i (00:14:20) zoom in 19.5002 23.7741
+\i (00:14:20) trapsize 1413
+\i (00:14:21) zoom out 1 
+\i (00:14:21) setwindow pcb
+\i (00:14:21) zoom out 15.0911 25.2438
+\i (00:14:21) trapsize 2826
+\i (00:14:21) zoom out 1 
+\i (00:14:21) setwindow pcb
+\i (00:14:21) zoom out 15.0911 25.2438
+\i (00:14:21) trapsize 5653
+\i (00:14:21) zoom out 1 
+\i (00:14:21) setwindow pcb
+\i (00:14:21) zoom out 15.0910 25.2439
+\i (00:14:21) trapsize 11306
+\i (00:14:22) zoom out 1 
+\i (00:14:22) setwindow pcb
+\i (00:14:22) zoom out 15.0909 25.2438
+\i (00:14:22) trapsize 22611
+\i (00:14:23) zoom in 1 
+\i (00:14:23) setwindow pcb
+\i (00:14:23) zoom in -31.0359 19.8172
+\i (00:14:23) trapsize 11306
+\i (00:14:23) zoom in 1 
+\i (00:14:23) setwindow pcb
+\i (00:14:23) zoom in -31.0359 19.8172
+\i (00:14:23) trapsize 5653
+\i (00:14:26) zoom in 1 
+\i (00:14:26) setwindow pcb
+\i (00:14:26) zoom in 43.8071 20.6086
+\i (00:14:26) trapsize 2826
+\i (00:14:26) zoom in 1 
+\i (00:14:26) setwindow pcb
+\i (00:14:26) zoom in 43.8071 20.6086
+\i (00:14:26) trapsize 1413
+\i (00:14:26) zoom in 1 
+\i (00:14:26) setwindow pcb
+\i (00:14:26) zoom in 37.9847 22.4740
+\i (00:14:26) trapsize 707
+\i (00:14:26) zoom in 1 
+\i (00:14:26) setwindow pcb
+\i (00:14:26) zoom in 34.7627 23.2371
+\i (00:14:26) trapsize 353
+\i (00:14:27) zoom in 1 
+\i (00:14:27) setwindow pcb
+\i (00:14:27) zoom in 34.7627 23.2442
+\i (00:14:27) trapsize 177
+\i (00:14:28) zoom out 1 
+\i (00:14:28) setwindow pcb
+\i (00:14:28) zoom out 35.8756 23.5798
+\i (00:14:28) trapsize 353
+\i (00:14:29) zoom in 1 
+\i (00:14:29) setwindow pcb
+\i (00:14:29) zoom in 35.9534 24.8518
+\i (00:14:29) trapsize 177
+\i (00:14:34) zoom out 1 
+\i (00:14:34) setwindow pcb
+\i (00:14:34) zoom out 35.6743 24.3077
+\i (00:14:34) trapsize 353
+\i (00:14:34) zoom out 1 
+\i (00:14:34) setwindow pcb
+\i (00:14:34) zoom out 35.6955 24.3006
+\i (00:14:34) trapsize 707
+\i (00:14:34) zoom out 1 
+\i (00:14:34) setwindow pcb
+\i (00:14:34) zoom out 37.2500 23.9333
+\i (00:14:34) trapsize 1413
+\i (00:14:34) zoom out 1 
+\i (00:14:34) setwindow pcb
+\i (00:14:34) zoom out 37.3630 23.8485
+\i (00:14:34) trapsize 2826
+\i (00:14:34) zoom out 1 
+\i (00:14:34) setwindow pcb
+\i (00:14:34) zoom out 39.9633 24.0180
+\i (00:14:34) trapsize 5653
+\i (00:14:38) zoom out 1 
+\i (00:14:38) setwindow pcb
+\i (00:14:38) zoom out 52.9648 39.7328
+\i (00:14:38) trapsize 11306
+\i (00:14:39) zoom in 1 
+\i (00:14:39) setwindow pcb
+\i (00:14:39) zoom in 60.9917 57.1434
+\i (00:14:39) trapsize 5653
+\i (00:14:40) zoom in 1 
+\i (00:14:40) setwindow pcb
+\i (00:14:40) zoom in 55.6781 61.3265
+\i (00:14:40) trapsize 2826
+\i (00:14:40) zoom in 1 
+\i (00:14:40) setwindow pcb
+\i (00:14:40) zoom in 56.1868 61.4395
+\i (00:14:40) trapsize 1413
+\i (00:14:40) zoom in 1 
+\i (00:14:40) setwindow pcb
+\i (00:14:40) zoom in 58.3914 55.7868
+\i (00:14:40) trapsize 707
+\i (00:14:40) zoom in 1 
+\i (00:14:40) setwindow pcb
+\i (00:14:40) zoom in 58.4762 56.3662
+\i (00:14:40) trapsize 353
+\i (00:14:41) zoom out 1 
+\i (00:14:41) setwindow pcb
+\i (00:14:41) zoom out 58.1794 57.2636
+\i (00:14:41) trapsize 707
+\i (00:14:42) zoom out 1 
+\i (00:14:42) setwindow pcb
+\i (00:14:42) zoom out 57.2327 58.0268
+\i (00:14:42) trapsize 1413
+\i (00:14:42) zoom in 1 
+\i (00:14:42) setwindow pcb
+\i (00:14:42) zoom in 57.1761 59.5531
+\i (00:14:42) trapsize 707
+\i (00:14:42) zoom in 1 
+\i (00:14:42) setwindow pcb
+\i (00:14:42) zoom in 57.1761 59.5673
+\i (00:14:42) trapsize 353
+\i (00:14:43) zoom out 1 
+\i (00:14:43) setwindow pcb
+\i (00:14:43) zoom out 56.7521 58.7901
+\i (00:14:43) trapsize 707
+\i (00:14:43) zoom out 1 
+\i (00:14:43) setwindow pcb
+\i (00:14:43) zoom out 57.1761 59.3130
+\i (00:14:43) trapsize 1413
+\i (00:14:44) zoom in 1 
+\i (00:14:44) setwindow pcb
+\i (00:14:44) zoom in 58.1937 59.8217
+\i (00:14:44) trapsize 707
+\i (00:14:45) zoom in 1 
+\i (00:14:45) setwindow pcb
+\i (00:14:45) zoom in 54.6607 58.3520
+\i (00:14:45) trapsize 353
+\i (00:14:46) zoom out 1 
+\i (00:14:46) setwindow pcb
+\i (00:14:46) zoom out 56.5756 57.3557
+\i (00:14:46) trapsize 707
+\i (00:14:46) zoom out 1 
+\i (00:14:46) setwindow pcb
+\i (00:14:46) zoom out 56.5756 57.3558
+\i (00:14:46) trapsize 1413
+\i (00:14:50) zoom in 1 
+\i (00:14:50) setwindow pcb
+\i (00:14:50) zoom in 57.5365 58.5994
+\i (00:14:50) trapsize 707
+\i (00:14:51) zoom in 1 
+\i (00:14:51) setwindow pcb
+\i (00:14:51) zoom in 58.4269 57.3275
+\i (00:14:51) trapsize 353
+\i (00:14:52) zoom in 1 
+\i (00:14:52) setwindow pcb
+\i (00:14:52) zoom in 59.6563 57.2851
+\i (00:14:52) trapsize 177
+\i (00:14:52) zoom out 1 
+\i (00:14:52) setwindow pcb
+\i (00:14:52) zoom out 59.6387 57.2675
+\i (00:14:52) trapsize 353
+\i (00:15:56) zoom in 1 
+\i (00:15:56) setwindow pcb
+\i (00:15:56) zoom in 55.7666 57.3381
+\i (00:15:56) trapsize 177
+\i (00:15:57) zoom in 1 
+\i (00:15:57) setwindow pcb
+\i (00:15:57) zoom in 55.9327 57.4618
+\i (00:15:57) trapsize 88
+\i (00:15:57) zoom out 1 
+\i (00:15:57) setwindow pcb
+\i (00:15:57) zoom out 55.9945 57.4230
+\i (00:15:57) trapsize 177
+\i (00:15:58) zoom out 1 
+\i (00:15:58) setwindow pcb
+\i (00:15:58) zoom out 55.9945 57.4229
+\i (00:15:58) trapsize 353
+\i (00:15:58) zoom out 1 
+\i (00:15:58) setwindow pcb
+\i (00:15:58) zoom out 55.9946 57.4230
+\i (00:15:58) trapsize 707
+\i (00:15:59) zoom in 1 
+\i (00:15:59) setwindow pcb
+\i (00:15:59) zoom in 55.9946 57.4513
+\i (00:15:59) trapsize 353
+\i (00:15:59) zoom in 1 
+\i (00:15:59) setwindow pcb
+\i (00:15:59) zoom in 56.0228 57.6068
+\i (00:15:59) trapsize 177
+\i (00:16:00) zoom in 1 
+\i (00:16:00) setwindow pcb
+\i (00:16:00) zoom in 56.0229 57.6068
+\i (00:16:00) trapsize 88
+\i (00:16:02) zoom out 1 
+\i (00:16:02) setwindow pcb
+\i (00:16:02) zoom out 56.0229 57.6069
+\i (00:16:02) trapsize 177
+\i (00:16:02) zoom out 1 
+\i (00:16:02) setwindow pcb
+\i (00:16:02) zoom out 56.0193 57.5962
+\i (00:16:02) trapsize 353
+\i (00:16:03) zoom out 1 
+\i (00:16:03) setwindow pcb
+\i (00:16:03) zoom out 55.9628 57.5186
+\i (00:16:03) trapsize 707
+\i (00:16:03) zoom out 1 
+\i (00:16:03) setwindow pcb
+\i (00:16:03) zoom out 55.9064 57.4620
+\i (00:16:03) trapsize 1413
+\i (00:16:03) zoom out 1 
+\i (00:16:03) setwindow pcb
+\i (00:16:03) zoom out 55.1150 54.0421
+\i (00:16:03) trapsize 2826
+\i (00:16:04) zoom out 1 
+\i (00:16:04) setwindow pcb
+\i (00:16:04) zoom out 50.5927 52.9680
+\i (00:16:04) trapsize 5653
+\i (00:16:04) zoom out 1 
+\i (00:16:04) setwindow pcb
+\i (00:16:04) zoom out 50.1404 52.5158
+\i (00:16:04) trapsize 11306
+\i (00:16:04) zoom out 1 
+\i (00:16:04) setwindow pcb
+\i (00:16:04) zoom out 28.2075 28.7740
+\i (00:16:04) trapsize 22611
+\i (00:16:04) zoom out 1 
+\i (00:16:04) setwindow pcb
+\i (00:16:04) zoom out 22.7809 22.8951
+\i (00:16:04) trapsize 45222
+\i (00:16:04) zoom out 1 
+\i (00:16:04) setwindow pcb
+\i (00:16:04) zoom out 108.9274 10.2329
+\i (00:16:04) trapsize 90445
+\i (00:16:05) zoom in 1 
+\i (00:16:05) setwindow pcb
+\i (00:16:05) zoom in -18.5997 28.4315
+\i (00:16:05) trapsize 45222
+\i (00:16:05) zoom in 1 
+\i (00:16:05) setwindow pcb
+\i (00:16:05) zoom in -18.5997 28.4316
+\i (00:16:05) trapsize 22611
+\i (00:16:05) zoom in 1 
+\i (00:16:05) setwindow pcb
+\i (00:16:05) zoom in -18.5996 28.4316
+\i (00:16:05) trapsize 11306
+\i (00:16:05) zoom in 1 
+\i (00:16:05) setwindow pcb
+\i (00:16:05) zoom in -18.5996 28.4316
+\i (00:16:05) trapsize 5653
+\i (00:16:05) zoom in 1 
+\i (00:16:05) setwindow pcb
+\i (00:16:05) zoom in 7.9686 29.4492
+\i (00:16:05) trapsize 2826
+\i (00:16:06) zoom out 1 
+\i (00:16:06) setwindow pcb
+\i (00:16:06) zoom out 13.8475 31.0320
+\i (00:16:06) trapsize 5653
+\i (00:16:07) drag_start grid 36.0065 29.7884
+\i (00:16:07) drag_stop 32.3887 39.7373
+\i (00:16:08) drag_start grid -18.0342 33.1801
+\i (00:16:08) drag_stop -15.9992 47.0860
+\i (00:16:09) zoom in 1 
+\i (00:16:09) setwindow pcb
+\i (00:16:09) zoom in 35.1021 20.4048
+\i (00:16:09) trapsize 2826
+\i (00:16:09) zoom in 1 
+\i (00:16:09) setwindow pcb
+\i (00:16:09) zoom in 35.1021 20.4048
+\i (00:16:09) trapsize 1413
+\i (00:16:09) zoom in 1 
+\i (00:16:09) setwindow pcb
+\i (00:16:09) zoom in 35.1304 20.8005
+\i (00:16:09) trapsize 707
+\i (00:16:09) zoom in 1 
+\i (00:16:09) setwindow pcb
+\i (00:16:09) zoom in 35.2717 21.7756
+\i (00:16:09) trapsize 353
+\i (00:16:09) zoom in 1 
+\i (00:16:09) setwindow pcb
+\i (00:16:09) zoom in 35.2718 21.7756
+\i (00:16:09) trapsize 177
+\i (00:16:10) zoom out 1 
+\i (00:16:10) setwindow pcb
+\i (00:16:10) zoom out 35.3107 22.9026
+\i (00:16:10) trapsize 353
+\i (00:16:10) zoom out 1 
+\i (00:16:10) setwindow pcb
+\i (00:16:10) zoom out 35.2895 22.8956
+\i (00:16:10) trapsize 707
+\i (00:16:10) zoom in 1 
+\i (00:16:10) setwindow pcb
+\i (00:16:10) zoom in 37.1408 24.2805
+\i (00:16:10) trapsize 353
+\i (00:16:10) zoom in 1 
+\i (00:16:10) setwindow pcb
+\i (00:16:10) zoom in 37.1408 24.2805
+\i (00:16:10) trapsize 177
+\i (00:16:11) zoom in 1 
+\i (00:16:11) setwindow pcb
+\i (00:16:11) zoom in 36.2081 23.8848
+\i (00:16:11) trapsize 88
+\i (00:16:13) zoom out 1 
+\i (00:16:13) setwindow pcb
+\i (00:16:13) zoom out 36.3495 23.8407
+\i (00:16:13) trapsize 177
+\i (00:16:15) zoom out 1 
+\i (00:16:15) setwindow pcb
+\i (00:16:15) zoom out 36.3353 23.7559
+\i (00:16:15) trapsize 353
+\i (00:16:15) zoom out 1 
+\i (00:16:15) setwindow pcb
+\i (00:16:15) zoom out 36.3353 23.7559
+\i (00:16:15) trapsize 707
+\i (00:16:15) zoom out 1 
+\i (00:16:15) setwindow pcb
+\i (00:16:15) zoom out 35.9679 24.7876
+\i (00:16:15) trapsize 1413
+\i (00:16:16) zoom out 1 
+\i (00:16:16) setwindow pcb
+\i (00:16:16) zoom out 33.8199 27.5009
+\i (00:16:16) trapsize 2826
+\i (00:16:17) zoom in 1 
+\i (00:16:17) setwindow pcb
+\i (00:16:17) zoom in 34.9505 36.9411
+\i (00:16:17) trapsize 1413
+\i (00:16:17) zoom in 1 
+\i (00:16:17) setwindow pcb
+\i (00:16:17) zoom in 35.1766 36.7715
+\i (00:16:17) trapsize 707
+\i (00:16:17) zoom out 1 
+\i (00:16:17) setwindow pcb
+\i (00:16:17) zoom out 35.3038 32.6026
+\i (00:16:17) trapsize 1413
+\i (00:16:17) zoom out 1 
+\i (00:16:17) setwindow pcb
+\i (00:16:17) zoom out 35.3038 32.5178
+\i (00:16:17) trapsize 2826
+\i (00:16:18) zoom in 1 
+\i (00:16:18) setwindow pcb
+\i (00:16:18) zoom in 34.0037 22.1731
+\i (00:16:18) trapsize 1413
+\i (00:16:18) zoom in 1 
+\i (00:16:18) setwindow pcb
+\i (00:16:18) zoom in 34.2864 23.6994
+\i (00:16:18) trapsize 707
+\i (00:16:19) zoom in 1 
+\i (00:16:19) setwindow pcb
+\i (00:16:19) zoom in 34.3429 23.9256
+\i (00:16:19) trapsize 353
+\i (00:16:19) zoom out 1 
+\i (00:16:19) setwindow pcb
+\i (00:16:19) zoom out 31.8557 23.7631
+\i (00:16:19) trapsize 707
+\i (00:16:20) zoom out 1 
+\i (00:16:20) setwindow pcb
+\i (00:16:20) zoom out 31.9829 25.1621
+\i (00:16:20) trapsize 1413
+\i (00:16:20) zoom out 1 
+\i (00:16:20) setwindow pcb
+\i (00:16:20) zoom out 32.3787 25.3034
+\i (00:16:20) trapsize 2826
+\i (00:16:27) zoom out 1 
+\i (00:16:27) setwindow pcb
+\i (00:16:27) zoom out 40.4056 12.6977
+\i (00:16:27) trapsize 5653
+\i (00:16:27) zoom out 1 
+\i (00:16:27) setwindow pcb
+\i (00:16:27) zoom out 51.1460 15.9763
+\i (00:16:27) trapsize 11306
+\i (00:16:28) zoom in 1 
+\i (00:16:28) setwindow pcb
+\i (00:16:28) zoom in 19.9424 21.8553
+\i (00:16:28) trapsize 5653
+\i (00:16:28) zoom in 1 
+\i (00:16:28) setwindow pcb
+\i (00:16:28) zoom in 24.6908 21.8553
+\i (00:16:28) trapsize 2826
+\i (00:16:29) zoom in 1 
+\i (00:16:29) setwindow pcb
+\i (00:16:29) zoom in 29.9479 17.0505
+\i (00:16:29) trapsize 1413
+\i (00:16:30) zoom in 1 
+\i (00:16:30) setwindow pcb
+\i (00:16:30) zoom in 25.9910 17.3614
+\i (00:16:30) trapsize 707
+\i (00:16:30) zoom in 1 
+\i (00:16:30) setwindow pcb
+\i (00:16:30) zoom in 26.4997 17.6441
+\i (00:16:30) trapsize 353
+\i (00:16:31) zoom out 1 
+\i (00:16:31) setwindow pcb
+\i (00:16:31) zoom out 25.3692 18.3012
+\i (00:16:31) trapsize 707
+\i (00:16:32) zoom out 1 
+\i (00:16:32) setwindow pcb
+\i (00:16:32) zoom out 27.5737 18.0045
+\i (00:16:32) trapsize 1413
+\i (00:16:33) zoom out 1 
+\i (00:16:33) setwindow pcb
+\i (00:16:33) zoom out 34.6680 17.9196
+\i (00:16:33) trapsize 2826
+\i (00:16:33) zoom out 1 
+\i (00:16:33) setwindow pcb
+\i (00:16:33) zoom out 34.6680 17.9197
+\i (00:16:33) trapsize 5653
+\i (00:16:34) zoom in 1 
+\i (00:16:34) setwindow pcb
+\i (00:16:34) zoom in 19.2924 23.1202
+\i (00:16:34) trapsize 2826
+\i (00:16:35) zoom in 1 
+\i (00:16:35) setwindow pcb
+\i (00:16:35) zoom in 19.2924 23.1768
+\i (00:16:35) trapsize 1413
+\i (00:16:35) zoom out 1 
+\i (00:16:35) setwindow pcb
+\i (00:16:35) zoom out 20.4230 23.3747
+\i (00:16:35) trapsize 2826
+\i (00:16:36) zoom in 1 
+\i (00:16:36) setwindow pcb
+\i (00:16:36) zoom in 36.9291 24.2791
+\i (00:16:36) trapsize 1413
+\i (00:16:36) zoom in 1 
+\i (00:16:36) setwindow pcb
+\i (00:16:36) zoom in 36.9291 24.2508
+\i (00:16:36) trapsize 707
+\i (00:16:47) zoom out 1 
+\i (00:16:47) setwindow pcb
+\i (00:16:47) zoom out 37.7205 24.2650
+\i (00:16:47) trapsize 1413
+\i (00:16:48) zoom out 1 
+\i (00:16:48) setwindow pcb
+\i (00:16:48) zoom out 37.4096 25.5369
+\i (00:16:48) trapsize 2826
+\i (00:16:53) zoom in 1 
+\i (00:16:53) setwindow pcb
+\i (00:16:53) zoom in 34.6963 23.6715
+\i (00:16:53) trapsize 1413
+\i (00:16:53) zoom in 1 
+\i (00:16:53) setwindow pcb
+\i (00:16:53) zoom in 34.6963 23.6715
+\i (00:16:53) trapsize 707
+\i (00:16:54) zoom in 1 
+\i (00:16:54) setwindow pcb
+\i (00:16:54) zoom in 34.8659 23.6856
+\i (00:16:54) trapsize 353
+\i (00:18:46) zoom out 1 
+\i (00:18:46) setwindow pcb
+\i (00:18:46) zoom out 33.3609 23.1274
+\i (00:18:46) trapsize 707
+\i (00:18:46) zoom out 1 
+\i (00:18:46) setwindow pcb
+\i (00:18:46) zoom out 33.2337 23.1133
+\i (00:18:46) trapsize 1413
+\i (00:18:46) zoom out 1 
+\i (00:18:46) setwindow pcb
+\i (00:18:46) zoom out 33.0359 23.0002
+\i (00:18:46) trapsize 2826
+\i (00:18:47) zoom out 1 
+\i (00:18:47) setwindow pcb
+\i (00:18:47) zoom out 32.8662 24.0176
+\i (00:18:47) trapsize 5653
+\i (00:18:47) zoom out 1 
+\i (00:18:47) setwindow pcb
+\i (00:18:47) zoom out 32.8663 24.0177
+\i (00:18:47) trapsize 11306
+\i (00:18:47) zoom out 1 
+\i (00:18:47) setwindow pcb
+\i (00:18:47) zoom out 32.8662 24.0177
+\i (00:18:47) trapsize 22611
+\i (00:18:47) zoom in 1 
+\i (00:18:47) setwindow pcb
+\i (00:18:47) zoom in -37.5931 84.6156
+\i (00:18:47) trapsize 11306
+\i (00:18:47) zoom in 1 
+\i (00:18:47) setwindow pcb
+\i (00:18:47) zoom in -14.0774 83.2590
+\i (00:18:47) trapsize 5653
+\i (00:18:47) zoom in 1 
+\i (00:18:47) setwindow pcb
+\i (00:18:47) zoom in -5.5982 83.4851
+\i (00:18:47) trapsize 2826
+\i (00:18:48) zoom in 1 
+\i (00:18:48) setwindow pcb
+\i (00:18:48) zoom in 32.5017 85.5202
+\i (00:18:48) trapsize 1413
+\i (00:18:48) zoom in 1 
+\i (00:18:48) setwindow pcb
+\i (00:18:48) zoom in 26.2836 85.1811
+\i (00:18:48) trapsize 707
+\i (00:18:48) zoom out 1 
+\i (00:18:48) setwindow pcb
+\i (00:18:48) zoom out 22.3408 86.5661
+\i (00:18:48) trapsize 1413
+\i (00:18:49) zoom out 1 
+\i (00:18:49) setwindow pcb
+\i (00:18:49) zoom out 20.1928 87.4988
+\i (00:18:49) trapsize 2826
+\i (00:18:49) zoom out 1 
+\i (00:18:49) setwindow pcb
+\i (00:18:49) zoom out 20.1928 87.4987
+\i (00:18:49) trapsize 5653
+\i (00:18:50) zoom in 1 
+\i (00:18:50) setwindow pcb
+\i (00:18:50) zoom in 16.8012 94.9604
+\i (00:18:50) trapsize 2826
+\i (00:18:50) zoom in 1 
+\i (00:18:50) setwindow pcb
+\i (00:18:50) zoom in 16.8012 94.9604
+\i (00:18:50) trapsize 1413
+\i (00:18:51) zoom in 1 
+\i (00:18:51) setwindow pcb
+\i (00:18:51) zoom in 18.1296 92.1906
+\i (00:18:51) trapsize 707
+\i (00:18:51) zoom in 1 
+\i (00:18:51) setwindow pcb
+\i (00:18:51) zoom in 18.1014 92.1623
+\i (00:18:51) trapsize 353
+\i (00:18:52) zoom out 1 
+\i (00:18:52) setwindow pcb
+\i (00:18:52) zoom out 19.1260 91.2367
+\i (00:18:52) trapsize 707
+\i (00:28:15) zoom out 1 
+\i (00:28:15) setwindow pcb
+\i (00:28:15) zoom out 20.6240 92.1411
+\i (00:28:15) trapsize 1413
+\i (00:28:15) zoom out 1 
+\i (00:28:15) setwindow pcb
+\i (00:28:15) zoom out 20.1718 91.5193
+\i (00:28:15) trapsize 2826
+\i (00:28:15) zoom out 1 
+\i (00:28:15) setwindow pcb
+\i (00:28:15) zoom out 23.4504 89.6538
+\i (00:28:15) trapsize 5653
+\i (00:28:15) zoom out 1 
+\i (00:28:15) setwindow pcb
+\i (00:28:15) zoom out 23.5635 88.9756
+\i (00:28:15) trapsize 11306
+\i (00:28:16) zoom in 1 
+\i (00:28:16) setwindow pcb
+\i (00:28:16) zoom in 60.3133 82.1922
+\i (00:28:16) trapsize 5653
+\i (00:28:17) zoom in 1 
+\i (00:28:17) setwindow pcb
+\i (00:28:17) zoom in 8.9860 87.2797
+\i (00:28:17) trapsize 2826
+\i (00:28:17) zoom in 1 
+\i (00:28:17) setwindow pcb
+\i (00:28:17) zoom in 7.3467 86.9405
+\i (00:28:17) trapsize 1413
+\i (00:28:17) zoom in 1 
+\i (00:28:17) setwindow pcb
+\i (00:28:17) zoom in 7.3468 87.0254
+\i (00:28:17) trapsize 707
+\i (00:28:19) zoom out 1 
+\i (00:28:19) setwindow pcb
+\i (00:28:19) zoom out 7.5164 87.1526
+\i (00:28:19) trapsize 1413
+\i (00:28:20) zoom in 1 
+\i (00:28:20) setwindow pcb
+\i (00:28:20) zoom in 13.3105 90.0638
+\i (00:28:20) trapsize 707
+\i (00:28:21) zoom in 1 
+\i (00:28:21) setwindow pcb
+\i (00:28:21) zoom in 15.6989 89.1028
+\i (00:28:21) trapsize 353
+\i (00:28:23) zoom out 1 
+\i (00:28:23) setwindow pcb
+\i (00:28:23) zoom out 15.5505 88.9545
+\i (00:28:23) trapsize 707
+\i (00:28:23) zoom in 1 
+\i (00:28:23) setwindow pcb
+\i (00:28:23) zoom in 15.5505 88.9545
+\i (00:28:23) trapsize 353
+\i (00:28:24) zoom in 1 
+\i (00:28:24) setwindow pcb
+\i (00:28:24) zoom in 15.5505 88.9545
+\i (00:28:24) trapsize 177
+\i (00:28:25) zoom out 1 
+\i (00:28:25) setwindow pcb
+\i (00:28:25) zoom out 15.5505 88.9545
+\i (00:28:25) trapsize 353
+\i (00:28:26) zoom in 1 
+\i (00:28:26) setwindow pcb
+\i (00:28:26) zoom in 13.1763 89.3573
+\i (00:28:26) trapsize 177
+\i (00:28:26) zoom out 1 
+\i (00:28:26) setwindow pcb
+\i (00:28:26) zoom out 12.7170 89.4456
+\i (00:28:26) trapsize 353
+\i (00:28:26) zoom in 1 
+\i (00:28:26) setwindow pcb
+\i (00:28:26) zoom in 12.7170 89.4457
+\i (00:28:26) trapsize 177
+\i (00:28:26) zoom in 1 
+\i (00:28:26) setwindow pcb
+\i (00:28:26) zoom in 12.7170 89.4457
+\i (00:28:26) trapsize 88
+\i (00:28:27) zoom out 1 
+\i (00:28:27) setwindow pcb
+\i (00:28:27) zoom out 12.7170 89.4457
+\i (00:28:27) trapsize 177
+\i (00:28:28) zoom in 1 
+\i (00:28:28) setwindow pcb
+\i (00:28:28) zoom in 12.7170 89.4457
+\i (00:28:28) trapsize 88
+\i (00:28:28) zoom out 1 
+\i (00:28:28) setwindow pcb
+\i (00:28:28) zoom out 12.7170 89.4457
+\i (00:28:28) trapsize 177
+\i (00:28:28) zoom out 1 
+\i (00:28:28) setwindow pcb
+\i (00:28:28) zoom out 12.7170 89.4422
+\i (00:28:28) trapsize 353
+\i (00:28:29) zoom out 1 
+\i (00:28:29) setwindow pcb
+\i (00:28:29) zoom out 12.7170 89.4069
+\i (00:28:29) trapsize 707
+\i (00:28:29) zoom out 1 
+\i (00:28:29) setwindow pcb
+\i (00:28:29) zoom out 12.6747 89.0960
+\i (00:28:29) trapsize 1413
+\i (00:28:29) zoom out 1 
+\i (00:28:29) setwindow pcb
+\i (00:28:29) zoom out 12.5334 88.5307
+\i (00:28:29) trapsize 2826
+\i (00:28:29) zoom out 1 
+\i (00:28:29) setwindow pcb
+\i (00:28:29) zoom out 12.5334 87.2871
+\i (00:28:29) trapsize 5653
+\i (00:28:29) zoom out 1 
+\i (00:28:29) setwindow pcb
+\i (00:28:29) zoom out 18.6384 82.4257
+\i (00:28:29) trapsize 11306
+\i (00:28:29) zoom out 1 
+\i (00:28:29) setwindow pcb
+\i (00:28:29) zoom out 19.5427 74.9640
+\i (00:28:29) trapsize 22611
+\i (00:28:30) zoom in 1 
+\i (00:28:30) setwindow pcb
+\i (00:28:30) zoom in -8.9474 10.7482
+\i (00:28:30) trapsize 11306
+\i (00:28:30) zoom in 1 
+\i (00:28:30) setwindow pcb
+\i (00:28:30) zoom in -8.9474 10.7482
+\i (00:28:30) trapsize 5653
+\i (00:36:11) zoom in 1 
+\i (00:36:11) setwindow pcb
+\i (00:36:11) zoom in 5.1846 56.7619
+\i (00:36:11) trapsize 2826
+\i (00:36:11) zoom in 1 
+\i (00:36:11) setwindow pcb
+\i (00:36:11) zoom in 5.1846 56.7620
+\i (00:36:11) trapsize 1413
+\i (00:36:11) zoom in 1 
+\i (00:36:11) setwindow pcb
+\i (00:36:11) zoom in 5.1847 56.7620
+\i (00:36:11) trapsize 707
+\i (00:36:11) zoom in 1 
+\i (00:36:11) setwindow pcb
+\i (00:36:11) zoom in 10.1733 56.5641
+\i (00:36:11) trapsize 353
+\i (00:38:18) zoom out 1 
+\i (00:38:18) setwindow pcb
+\i (00:38:18) zoom out 9.2759 56.6489
+\i (00:38:18) trapsize 707
+\i (00:38:18) zoom out 1 
+\i (00:38:18) setwindow pcb
+\i (00:38:18) zoom out 9.2619 56.5359
+\i (00:38:18) trapsize 1413
+\i (00:38:18) zoom out 1 
+\i (00:38:18) setwindow pcb
+\i (00:38:18) zoom out 9.1488 56.3945
+\i (00:38:18) trapsize 2826
+\i (00:38:18) zoom out 1 
+\i (00:38:18) setwindow pcb
+\i (00:38:18) zoom out 9.1488 56.2815
+\i (00:38:18) trapsize 5653
+\i (00:38:18) zoom out 1 
+\i (00:38:18) setwindow pcb
+\i (00:38:18) zoom out 9.1488 56.2815
+\i (00:38:18) trapsize 11306
+\i (00:38:19) zoom out 1 
+\i (00:38:19) setwindow pcb
+\i (00:38:19) zoom out 14.5754 75.0488
+\i (00:38:19) trapsize 22611
+\i (00:38:19) zoom out 1 
+\i (00:38:19) setwindow pcb
+\i (00:38:19) zoom out 116.1630 183.0921
+\i (00:38:19) trapsize 45222
+\i (00:38:19) zoom out 1 
+\i (00:38:19) setwindow pcb
+\i (00:38:19) zoom out 336.8482 449.9041
+\i (00:38:19) trapsize 90445
+\i (00:38:20) zoom in 1 
+\i (00:38:20) setwindow pcb
+\i (00:38:20) zoom in -31.2620 98.9785
+\i (00:38:20) trapsize 45222
+\i (00:38:21) zoom in 1 
+\i (00:38:21) setwindow pcb
+\i (00:38:21) zoom in -33.0709 67.3229
+\i (00:38:21) trapsize 22611
+\i (00:38:21) zoom in 1 
+\i (00:38:21) setwindow pcb
+\i (00:38:21) zoom in -33.0708 67.3229
+\i (00:38:21) trapsize 11306
+\i (00:38:22) zoom in 1 
+\i (00:38:22) setwindow pcb
+\i (00:38:22) zoom in 27.7533 89.2557
+\i (00:38:22) trapsize 5653
+\i (00:38:22) zoom in 1 
+\i (00:38:22) setwindow pcb
+\i (00:38:22) zoom in 25.9445 88.6904
+\i (00:38:22) trapsize 2826
+\i (00:38:22) zoom out 1 
+\i (00:38:22) setwindow pcb
+\i (00:38:22) zoom out 25.4923 87.6730
+\i (00:38:22) trapsize 5653
+\i (00:38:23) zoom in 1 
+\i (00:38:23) setwindow pcb
+\i (00:38:23) zoom in 47.6512 90.7254
+\i (00:38:23) trapsize 2826
+\i (00:38:23) zoom in 1 
+\i (00:38:23) setwindow pcb
+\i (00:38:23) zoom in 51.5517 91.8560
+\i (00:38:23) trapsize 1413
+\i (00:38:23) zoom in 1 
+\i (00:38:23) setwindow pcb
+\i (00:38:23) zoom in 51.5517 91.8843
+\i (00:38:23) trapsize 707
+\i (00:38:24) zoom out 1 
+\i (00:38:24) setwindow pcb
+\i (00:38:24) zoom out 50.3082 91.2908
+\i (00:38:24) trapsize 1413
+\i (00:38:24) zoom out 1 
+\i (00:38:24) setwindow pcb
+\i (00:38:24) zoom out 50.2233 91.1777
+\i (00:38:24) trapsize 2826
+\i (00:38:25) zoom out 1 
+\i (00:38:25) setwindow pcb
+\i (00:38:25) zoom out 31.5126 88.5773
+\i (00:38:25) trapsize 5653
+\i (00:38:25) zoom out 1 
+\i (00:38:25) setwindow pcb
+\i (00:38:25) zoom out 20.4331 90.7254
+\i (00:38:25) trapsize 11306
+\i (00:38:26) zoom out 1 
+\i (00:38:26) setwindow pcb
+\i (00:38:26) zoom out 20.4329 88.0121
+\i (00:38:26) trapsize 22611
+\i (00:38:26) zoom out 1 
+\i (00:38:26) setwindow pcb
+\i (00:38:26) zoom out 20.4329 87.5599
+\i (00:38:26) trapsize 45222
+\i (00:38:26) zoom out 1 
+\i (00:38:26) setwindow pcb
+\i (00:38:26) zoom out 20.4329 87.5600
+\i (00:38:26) trapsize 90445
+\i (00:40:54) zoom in 1 
+\i (00:40:54) setwindow pcb
+\i (00:40:54) zoom in -15.7449 26.6227
+\i (00:40:54) trapsize 45222
+\i (00:40:54) zoom in 1 
+\i (00:40:54) setwindow pcb
+\i (00:40:54) zoom in -14.8405 26.6227
+\i (00:40:54) trapsize 22611
+\i (00:40:54) zoom in 1 
+\i (00:40:54) setwindow pcb
+\i (00:40:54) zoom in -14.3882 26.6228
+\i (00:40:54) trapsize 11306
+\i (00:40:54) zoom in 1 
+\i (00:40:54) setwindow pcb
+\i (00:40:54) zoom in -1.0476 49.0079
+\i (00:40:54) trapsize 5653
+\i (00:40:54) zoom in 1 
+\i (00:40:54) setwindow pcb
+\i (00:40:54) zoom in -1.0476 49.0079
+\i (00:40:54) trapsize 2826
+\i (00:40:55) zoom in 1 
+\i (00:40:55) setwindow pcb
+\i (00:40:55) zoom in 3.2486 55.5086
+\i (00:40:55) trapsize 1413
+\i (00:40:55) zoom out 1 
+\i (00:40:55) setwindow pcb
+\i (00:40:55) zoom out 5.3119 60.3983
+\i (00:40:55) trapsize 2826
+\i (00:40:55) zoom out 1 
+\i (00:40:55) setwindow pcb
+\i (00:40:55) zoom out 5.3119 60.3984
+\i (00:40:55) trapsize 5653
+\i (00:41:09) zoom in 1 
+\i (00:41:09) setwindow pcb
+\i (00:41:09) zoom in 11.1909 65.1467
+\i (00:41:09) trapsize 2826
+\i (00:41:10) zoom in 1 
+\i (00:41:10) setwindow pcb
+\i (00:41:10) zoom in 11.1909 65.1467
+\i (00:41:10) trapsize 1413
+\i (00:41:10) zoom in 1 
+\i (00:41:10) setwindow pcb
+\i (00:41:10) zoom in 9.4668 65.0619
+\i (00:41:10) trapsize 707
+\i (00:41:11) zoom in 1 
+\i (00:41:11) setwindow pcb
+\i (00:41:11) zoom in 9.2407 65.7686
+\i (00:41:11) trapsize 353
+\i (00:41:11) zoom in 1 
+\i (00:41:11) setwindow pcb
+\i (00:41:11) zoom in 11.2050 65.3093
+\i (00:41:11) trapsize 177
+\i (00:41:12) zoom out 1 
+\i (00:41:12) setwindow pcb
+\i (00:41:12) zoom out 11.3923 65.2528
+\i (00:41:12) trapsize 353
+\i (00:41:14) drag_start grid 10.7352 65.2246
+\i (00:41:14) drag_stop 10.9754 65.2246
+\i (00:41:14) zoom out 1 
+\i (00:41:14) setwindow pcb
+\i (00:41:14) zoom out 11.1521 65.1398
+\i (00:41:14) trapsize 707
+\i (00:41:15) zoom in 1 
+\i (00:41:15) setwindow pcb
+\i (00:41:15) zoom in 5.8809 65.5638
+\i (00:41:15) trapsize 353
+\i (00:41:16) zoom in 1 
+\i (00:41:16) setwindow pcb
+\i (00:41:16) zoom in 9.8166 65.4719
+\i (00:41:16) trapsize 177
+\i (00:43:11) zoom out 1 
+\i (00:43:11) setwindow pcb
+\i (00:43:11) zoom out 9.3291 65.8005
+\i (00:43:11) trapsize 353
+\i (00:52:31) zoom out 1 
+\i (00:52:31) setwindow pcb
+\i (00:52:31) zoom out 9.2655 65.2070
+\i (00:52:31) trapsize 707
+\i (00:52:31) zoom out 1 
+\i (00:52:31) setwindow pcb
+\i (00:52:31) zoom out 9.1525 65.0940
+\i (00:52:31) trapsize 1413
+\i (00:52:31) zoom in 1 
+\i (00:52:31) setwindow pcb
+\i (00:52:31) zoom in 8.4177 64.5571
+\i (00:52:31) trapsize 707
+\i (00:52:31) zoom out 1 
+\i (00:52:31) setwindow pcb
+\i (00:52:31) zoom out 8.3612 64.5147
+\i (00:52:31) trapsize 1413
+\i (00:52:32) zoom out 1 
+\i (00:52:32) setwindow pcb
+\i (00:52:32) zoom out 8.1068 62.5646
+\i (00:52:32) trapsize 2826
+\i (00:52:32) zoom out 1 
+\i (00:52:32) setwindow pcb
+\i (00:52:32) zoom out 9.4069 62.4515
+\i (00:52:32) trapsize 5653
+\i (00:52:32) zoom out 1 
+\i (00:52:32) setwindow pcb
+\i (00:52:32) zoom out 9.8591 63.0167
+\i (00:52:32) trapsize 11306
+\i (00:52:32) zoom out 1 
+\i (00:52:32) setwindow pcb
+\i (00:52:32) zoom out 25.7182 70.0262
+\i (00:52:32) trapsize 22611
+\i (00:52:32) zoom in 1 
+\i (00:52:32) setwindow pcb
+\i (00:52:32) zoom in 154.1498 87.2206
+\i (00:52:32) trapsize 11306
+\i (00:52:33) zoom out 1 
+\i (00:52:33) setwindow pcb
+\i (00:52:33) zoom out 38.3805 78.8545
+\i (00:52:33) trapsize 22611
+\i (00:52:33) zoom out 1 
+\i (00:52:33) setwindow pcb
+\i (00:52:33) zoom out 38.3805 77.4978
+\i (00:52:33) trapsize 45222
+\i (00:52:33) zoom out 1 
+\i (00:52:33) setwindow pcb
+\i (00:52:33) zoom out 38.3805 238.2634
+\i (00:52:33) trapsize 90445
+\i (00:52:34) zoom in 1 
+\i (00:52:34) setwindow pcb
+\i (00:52:34) zoom in -24.9309 60.9917
+\i (00:52:34) trapsize 45222
+\i (00:52:34) zoom in 1 
+\i (00:52:34) setwindow pcb
+\i (00:52:34) zoom in -14.9820 107.1186
+\i (00:52:34) trapsize 22611
+\i (00:52:34) zoom in 1 
+\i (00:52:34) setwindow pcb
+\i (00:52:34) zoom in -15.8864 102.1442
+\i (00:52:34) trapsize 11306
+\i (00:52:34) zoom in 1 
+\i (00:52:34) setwindow pcb
+\i (00:52:34) zoom in -15.8864 100.3353
+\i (00:52:34) trapsize 5653
+\i (00:52:35) zoom out 1 
+\i (00:52:35) setwindow pcb
+\i (00:52:35) zoom out 18.7087 95.4740
+\i (00:52:35) trapsize 11306
+\i (00:52:35) zoom out 1 
+\i (00:52:35) setwindow pcb
+\i (00:52:35) zoom out 18.0304 95.0217
+\i (00:52:35) trapsize 22611
+\i (00:52:35) zoom in 1 
+\i (00:52:35) setwindow pcb
+\i (00:52:35) zoom in 6.7248 77.8372
+\i (00:52:35) trapsize 11306
+\i (00:52:35) zoom in 1 
+\i (00:52:35) setwindow pcb
+\i (00:52:35) zoom in 6.7248 78.0634
+\i (00:52:35) trapsize 5653
+\i (00:52:36) zoom in 1 
+\i (00:52:36) setwindow pcb
+\i (00:52:36) zoom in 12.4906 83.9423
+\i (00:52:36) trapsize 2826
+\i (00:52:36) zoom in 1 
+\i (00:52:36) setwindow pcb
+\i (00:52:36) zoom in 12.4906 83.9989
+\i (00:52:36) trapsize 1413
+\i (00:52:36) zoom in 1 
+\i (00:52:36) setwindow pcb
+\i (00:52:36) zoom in 17.6630 88.6342
+\i (00:52:36) trapsize 707
+\i (00:52:59) zoom out 1 
+\i (00:52:59) setwindow pcb
+\i (00:52:59) zoom out 27.9229 89.8354
+\i (00:52:59) trapsize 1413
+\i (00:52:59) zoom out 1 
+\i (00:52:59) setwindow pcb
+\i (00:52:59) zoom out 26.4814 89.3549
+\i (00:52:59) trapsize 2826
+\i (00:52:59) zoom out 1 
+\i (00:52:59) setwindow pcb
+\i (00:52:59) zoom out 20.1502 91.7291
+\i (00:52:59) trapsize 5653
+\i (00:52:59) zoom out 1 
+\i (00:52:59) setwindow pcb
+\i (00:52:59) zoom out 20.6024 80.4236
+\i (00:52:59) trapsize 11306
+\i (00:53:03) zoom in 1 
+\i (00:53:03) setwindow pcb
+\i (00:53:03) zoom in -5.7113 94.6686
+\i (00:53:03) trapsize 5653
+\i (00:53:03) zoom in 1 
+\i (00:53:03) setwindow pcb
+\i (00:53:03) zoom in -5.5982 93.8772
+\i (00:53:03) trapsize 2826
+\i (00:53:04) zoom in 1 
+\i (00:53:04) setwindow pcb
+\i (00:53:04) zoom in 21.0830 90.2594
+\i (00:53:04) trapsize 1413
+\i (00:53:04) zoom in 1 
+\i (00:53:04) setwindow pcb
+\i (00:53:04) zoom in 21.3092 90.4573
+\i (00:53:04) trapsize 707
+\i (00:53:05) zoom in 1 
+\i (00:53:05) setwindow pcb
+\i (00:53:05) zoom in 24.7857 90.1464
+\i (00:53:05) trapsize 353
+\i (00:53:05) zoom out 1 
+\i (00:53:05) setwindow pcb
+\i (00:53:05) zoom out 24.7291 90.1252
+\i (00:53:05) trapsize 707
+\i (00:53:05) zoom out 1 
+\i (00:53:05) setwindow pcb
+\i (00:53:05) zoom out 24.7292 90.1253
+\i (00:53:05) trapsize 1413
+\i (00:53:06) zoom in 1 
+\i (00:53:06) setwindow pcb
+\i (00:53:06) zoom in 27.0469 90.1535
+\i (00:53:06) trapsize 707
+\i (00:53:07) zoom out 1 
+\i (00:53:07) setwindow pcb
+\i (00:53:07) zoom out 27.3437 90.3090
+\i (00:53:07) trapsize 1413
+\i (00:53:07) zoom out 1 
+\i (00:53:07) setwindow pcb
+\i (00:53:07) zoom out 27.6829 89.4610
+\i (00:53:07) trapsize 2826
+\i (00:53:08) zoom in 1 
+\i (00:53:08) setwindow pcb
+\i (00:53:08) zoom in 27.6830 89.4610
+\i (00:53:08) trapsize 1413
+\i (00:53:08) zoom in 1 
+\i (00:53:08) setwindow pcb
+\i (00:53:08) zoom in 27.7113 89.4610
+\i (00:53:08) trapsize 707
+\i (00:53:09) zoom out 1 
+\i (00:53:09) setwindow pcb
+\i (00:53:09) zoom out 27.0189 89.6730
+\i (00:53:09) trapsize 1413
+\i (00:53:09) zoom out 1 
+\i (00:53:09) setwindow pcb
+\i (00:53:09) zoom out 27.0189 89.6730
+\i (00:53:09) trapsize 2826
+\i (00:53:10) zoom out 1 
+\i (00:53:10) setwindow pcb
+\i (00:53:10) zoom out 29.3365 87.6379
+\i (00:53:10) trapsize 5653
+\i (00:53:11) zoom in 1 
+\i (00:53:11) setwindow pcb
+\i (00:53:11) zoom in 40.0763 88.3163
+\i (00:53:11) trapsize 2826
+\i (00:53:11) zoom in 1 
+\i (00:53:11) setwindow pcb
+\i (00:53:11) zoom in 37.3065 88.6555
+\i (00:53:11) trapsize 1413
+\i (00:53:11) zoom in 1 
+\i (00:53:11) setwindow pcb
+\i (00:53:11) zoom in 33.8583 89.6165
+\i (00:53:11) trapsize 707
+\i (00:53:13) zoom in 1 
+\i (00:53:13) setwindow pcb
+\i (00:53:13) zoom in 32.2756 90.1111
+\i (00:53:13) trapsize 353
+\i (00:53:13) zoom out 1 
+\i (00:53:13) setwindow pcb
+\i (00:53:13) zoom out 32.7702 89.9556
+\i (00:53:13) trapsize 707
+\i (00:53:14) zoom out 1 
+\i (00:53:14) setwindow pcb
+\i (00:53:14) zoom out 34.6922 90.2666
+\i (00:53:14) trapsize 1413
+\i (00:53:15) zoom out 1 
+\i (00:53:15) setwindow pcb
+\i (00:53:15) zoom out 36.8402 89.6731
+\i (00:53:15) trapsize 2826
+\i (00:53:16) zoom in 1 
+\i (00:53:16) setwindow pcb
+\i (00:53:16) zoom in 40.4015 89.1078
+\i (00:53:16) trapsize 1413
+\i (00:53:16) zoom in 1 
+\i (00:53:16) setwindow pcb
+\i (00:53:16) zoom in 40.4015 89.1079
+\i (00:53:16) trapsize 707
+\i (00:53:16) zoom in 1 
+\i (00:53:16) setwindow pcb
+\i (00:53:16) zoom in 40.4015 89.1079
+\i (00:53:16) trapsize 353
+\i (00:53:17) zoom out 1 
+\i (00:53:17) setwindow pcb
+\i (00:53:17) zoom out 40.0765 89.1927
+\i (00:53:17) trapsize 707
+\i (01:06:24) zoom out 1 
+\i (01:06:24) setwindow pcb
+\i (01:06:24) zoom out 36.0631 89.7722
+\i (01:06:24) trapsize 1413
+\i (01:06:24) zoom in 1 
+\i (01:06:24) setwindow pcb
+\i (01:06:24) zoom in 36.0348 89.7440
+\i (01:06:24) trapsize 707
+\i (01:06:24) zoom out 1 
+\i (01:06:24) setwindow pcb
+\i (01:06:24) zoom out 35.9924 89.6875
+\i (01:06:24) trapsize 1413
+\i (01:06:24) zoom out 1 
+\i (01:06:24) setwindow pcb
+\i (01:06:24) zoom out 35.5120 89.0374
+\i (01:06:24) trapsize 2826
+\i (01:06:24) zoom out 1 
+\i (01:06:24) setwindow pcb
+\i (01:06:24) zoom out 35.5120 89.0373
+\i (01:06:24) trapsize 5653
+\i (01:06:24) zoom out 1 
+\i (01:06:24) setwindow pcb
+\i (01:06:24) zoom out 23.9802 95.5946
+\i (01:06:24) trapsize 11306
+\i (01:06:24) zoom out 1 
+\i (01:06:24) setwindow pcb
+\i (01:06:24) zoom out 96.4912 87.0023
+\i (01:06:24) trapsize 22611
+\i (01:06:25) zoom out 1 
+\i (01:06:25) setwindow pcb
+\i (01:06:25) zoom out 300.6703 77.0534
+\i (01:06:25) trapsize 45222
+\i (01:06:25) zoom in 1 
+\i (01:06:25) setwindow pcb
+\i (01:06:25) zoom in -45.7331 36.5716
+\i (01:06:25) trapsize 22611
+\i (01:06:25) zoom in 1 
+\i (01:06:25) setwindow pcb
+\i (01:06:25) zoom in -44.3764 36.5716
+\i (01:06:25) trapsize 11306
+\i (01:06:26) zoom in 1 
+\i (01:06:26) setwindow pcb
+\i (01:06:26) zoom in -2.7718 36.3455
+\i (01:06:26) trapsize 5653
+\i (01:06:26) zoom in 1 
+\i (01:06:26) setwindow pcb
+\i (01:06:26) zoom in -5.3721 36.0063
+\i (01:06:26) trapsize 2826
+\i (01:06:26) zoom out 1 
+\i (01:06:26) setwindow pcb
+\i (01:06:26) zoom out 41.3766 42.5636
+\i (01:06:26) trapsize 5653
+\i (01:06:27) zoom in 1 
+\i (01:06:27) setwindow pcb
+\i (01:06:27) zoom in 58.3349 52.2863
+\i (01:06:27) trapsize 2826
+\i (01:06:28) zoom in 1 
+\i (01:06:28) setwindow pcb
+\i (01:06:28) zoom in 58.6176 55.5084
+\i (01:06:28) trapsize 1413
+\i (01:06:28) zoom in 1 
+\i (01:06:28) setwindow pcb
+\i (01:06:28) zoom in 58.8438 57.0065
+\i (01:06:28) trapsize 707
+\i (01:06:30) zoom in 1 
+\i (01:06:30) setwindow pcb
+\i (01:06:30) zoom in 54.3923 57.5576
+\i (01:06:30) trapsize 353
+\i (01:06:31) zoom in 1 
+\i (01:06:31) setwindow pcb
+\i (01:06:31) zoom in 54.1591 57.7131
+\i (01:06:31) trapsize 177
+\i (01:06:31) zoom out 1 
+\i (01:06:31) setwindow pcb
+\i (01:06:31) zoom out 54.1910 57.7167
+\i (01:06:31) trapsize 353
+\i (01:06:31) zoom out 1 
+\i (01:06:31) setwindow pcb
+\i (01:06:31) zoom out 54.1838 57.7025
+\i (01:06:31) trapsize 707
+\i (01:06:31) zoom out 1 
+\i (01:06:31) setwindow pcb
+\i (01:06:31) zoom out 54.1698 57.5895
+\i (01:06:31) trapsize 1413
+\i (01:06:32) zoom in 1 
+\i (01:06:32) setwindow pcb
+\i (01:06:32) zoom in 60.2466 57.7592
+\i (01:06:32) trapsize 707
+\i (01:06:32) zoom in 1 
+\i (01:06:32) setwindow pcb
+\i (01:06:32) zoom in 60.9956 58.0560
+\i (01:06:32) trapsize 353
+\i (01:06:32) zoom out 1 
+\i (01:06:32) setwindow pcb
+\i (01:06:32) zoom out 60.6281 57.6603
+\i (01:06:32) trapsize 707
+\i (01:06:32) zoom out 1 
+\i (01:06:32) setwindow pcb
+\i (01:06:32) zoom out 60.5858 57.4907
+\i (01:06:32) trapsize 1413
+\i (01:06:33) zoom out 1 
+\i (01:06:33) setwindow pcb
+\i (01:06:33) zoom out 59.0596 56.9255
+\i (01:06:33) trapsize 2826
+\i (01:06:33) zoom out 1 
+\i (01:06:33) setwindow pcb
+\i (01:06:33) zoom out 58.7770 56.3602
+\i (01:06:33) trapsize 5653
+\i (01:06:37) zoom out 1 
+\i (01:06:37) setwindow pcb
+\i (01:06:37) zoom out 72.2307 30.9226
+\i (01:06:37) trapsize 11306
+\i (01:06:37) zoom out 1 
+\i (01:06:37) setwindow pcb
+\i (01:06:37) zoom out 159.1242 30.9227
+\i (01:06:37) trapsize 22611
+\i (01:06:38) zoom in 1 
+\i (01:06:38) setwindow pcb
+\i (01:06:38) zoom in 98.0740 24.1393
+\i (01:06:38) trapsize 11306
+\i (01:06:39) zoom in 1 
+\i (01:06:39) setwindow pcb
+\i (01:06:39) zoom in 53.7561 22.1043
+\i (01:06:39) trapsize 5653
+\i (01:06:39) zoom in 1 
+\i (01:06:39) setwindow pcb
+\i (01:06:39) zoom in 53.7561 22.1043
+\i (01:06:39) trapsize 2826
+\i (01:06:40) zoom in 1 
+\i (01:06:40) setwindow pcb
+\i (01:06:40) zoom in 62.1788 33.0708
+\i (01:06:40) trapsize 1413
+\i (01:06:41) zoom out 1 
+\i (01:06:41) setwindow pcb
+\i (01:06:41) zoom out 65.7966 34.5123
+\i (01:06:41) trapsize 2826
+\i (01:06:41) zoom in 1 
+\i (01:06:41) setwindow pcb
+\i (01:06:41) zoom in 64.7226 42.2001
+\i (01:06:41) trapsize 1413
+\i (01:06:41) zoom in 1 
+\i (01:06:41) setwindow pcb
+\i (01:06:41) zoom in 66.4750 42.9915
+\i (01:06:41) trapsize 707
+\i (01:10:08) zoom out 1 
+\i (01:10:08) setwindow pcb
+\i (01:10:08) zoom out 63.0692 39.9814
+\i (01:10:08) trapsize 1413
+\i (01:10:08) zoom out 1 
+\i (01:10:08) setwindow pcb
+\i (01:10:08) zoom out 62.8713 39.9248
+\i (01:10:08) trapsize 2826
+\i (01:10:09) zoom out 1 
+\i (01:10:09) setwindow pcb
+\i (01:10:09) zoom out 49.8698 43.3165
+\i (01:10:09) trapsize 5653
+\i (01:10:09) zoom out 1 
+\i (01:10:09) setwindow pcb
+\i (01:10:09) zoom out 49.7568 43.3166
+\i (01:10:09) trapsize 11306
+\i (01:10:09) zoom out 1 
+\i (01:10:09) setwindow pcb
+\i (01:10:09) zoom out 49.7568 43.3166
+\i (01:10:09) trapsize 22611
+\i (01:10:09) zoom out 1 
+\i (01:10:09) setwindow pcb
+\i (01:10:09) zoom out 49.3045 101.2396
+\i (01:10:09) trapsize 45222
+\i (01:10:10) zoom in 1 
+\i (01:10:10) setwindow pcb
+\i (01:10:10) zoom in -13.1023 85.4117
+\i (01:10:10) trapsize 22611
+\i (01:10:10) zoom in 1 
+\i (01:10:10) setwindow pcb
+\i (01:10:10) zoom in -13.1023 85.4118
+\i (01:10:10) trapsize 11306
+\i (01:10:11) zoom in 1 
+\i (01:10:11) setwindow pcb
+\i (01:10:11) zoom in -1.5705 90.8385
+\i (01:10:11) trapsize 5653
+\i (01:10:11) zoom in 1 
+\i (01:10:11) setwindow pcb
+\i (01:10:11) zoom in -2.0227 90.6124
+\i (01:10:11) trapsize 2826
+\i (01:10:11) zoom in 1 
+\i (01:10:11) setwindow pcb
+\i (01:10:11) zoom in 19.1753 88.5209
+\i (01:10:11) trapsize 1413
+\i (01:10:12) zoom in 1 
+\i (01:10:12) setwindow pcb
+\i (01:10:12) zoom in 13.2116 89.4819
+\i (01:10:12) trapsize 707
+\i (01:10:12) zoom in 1 
+\i (01:10:12) setwindow pcb
+\i (01:10:12) zoom in 14.3988 89.9483
+\i (01:10:12) trapsize 353
+\i (01:10:13) zoom out 1 
+\i (01:10:13) setwindow pcb
+\i (01:10:13) zoom out 14.7874 90.0049
+\i (01:10:13) trapsize 707
+\i (13:16:02) zoom out 1 
+\i (13:16:02) setwindow pcb
+\i (13:16:02) zoom out 20.4120 90.6549
+\i (13:16:02) trapsize 1413
+\i (13:16:02) zoom out 1 
+\i (13:16:02) setwindow pcb
+\i (13:16:02) zoom out 20.4403 90.5702
+\i (13:16:02) trapsize 2826
+\i (13:16:02) zoom out 1 
+\i (13:16:02) setwindow pcb
+\i (13:16:02) zoom out 20.4404 90.5702
+\i (13:16:02) trapsize 5653
+\i (13:16:02) zoom out 1 
+\i (13:16:02) setwindow pcb
+\i (13:16:02) zoom out 20.4404 90.5702
+\i (13:16:02) trapsize 11306
+\i (13:16:03) zoom out 1 
+\i (13:16:03) setwindow pcb
+\i (13:16:03) zoom out 61.4439 29.9723
+\i (13:16:03) trapsize 22611
+\i (13:16:04) zoom out 1 
+\i (13:16:04) setwindow pcb
+\i (13:16:04) zoom out 4.4637 29.0678
+\i (13:16:04) trapsize 45222
+\i (13:16:04) zoom out 1 
+\i (13:16:04) setwindow pcb
+\i (13:16:04) zoom out 57.3739 40.8256
+\i (13:16:04) trapsize 90445
+\i (13:16:04) zoom out 1 
+\i (13:16:04) setwindow pcb
+\i (13:16:04) zoom out 77.2717 55.2968
+\i (13:16:04) trapsize 180890
+\i (13:16:05) zoom in 1 
+\i (13:16:05) setwindow pcb
+\i (13:16:05) zoom in 23.0049 -24.0264
+\i (13:16:05) trapsize 90445
+\i (13:16:05) zoom in 1 
+\i (13:16:05) setwindow pcb
+\i (13:16:05) zoom in 21.1960 -24.0264
+\i (13:16:05) trapsize 45222
+\i (13:16:07) zoom out 1 
+\i (13:16:07) setwindow pcb
+\i (13:16:07) zoom out -5.0329 13.9604
+\i (13:16:07) trapsize 90445
+\i (13:16:08) zoom in 1 
+\i (13:16:08) setwindow pcb
+\i (13:16:08) zoom in -8.6507 50.1383
+\i (13:16:08) trapsize 45222
+\i (13:16:08) zoom in 1 
+\i (13:16:08) setwindow pcb
+\i (13:16:08) zoom in -8.6507 50.1383
+\i (13:16:08) trapsize 22611
+\i (13:16:09) zoom in 1 
+\i (13:16:09) setwindow pcb
+\i (13:16:09) zoom in -8.6507 49.2339
+\i (13:16:09) trapsize 11306
+\i (13:16:09) zoom in 1 
+\i (13:16:09) setwindow pcb
+\i (13:16:09) zoom in -0.2845 50.1384
+\i (13:16:09) trapsize 5653
+\i (13:16:09) zoom in 1 
+\i (13:16:09) setwindow pcb
+\i (13:16:09) zoom in -0.2845 50.1385
+\i (13:16:09) trapsize 2826
+\i (13:16:32) exit 
+\t (13:16:32)     Journal end - Wed Aug 26 08:59:54 2026
diff --git a/docs/hc_dfcd_protocol.opj b/docs/hc_dfcd_protocol.opj
new file mode 100644
index 0000000..0241c3f
--- /dev/null
+++ b/docs/hc_dfcd_protocol.opj
@@ -0,0 +1,24 @@
+(ExpressProject ""
+  (ProjectVersion "19981106")
+  (Folder "Design Resources"
+    (Folder "Library")
+    (File ".\hc_dfcd_protocol.dsn"
+      (Type "Schematic Design"))
+    (BuildFileAddedOrDeleted "x")
+    (CompileFileAddedOrDeleted "x")
+    (NoModify))
+  (Folder "Outputs")
+  (Folder "Referenced Projects")
+  (PartMRUSelector)
+  (GlobalState
+    (FileView
+      (Path "Design Resources")
+      (Path "Design Resources" ".\hc_dfcd_protocol.dsn")
+      (Path "Design Resources" ".\hc_dfcd_protocol.dsn" "SCHEMATIC1")
+      (Select "Design Resources" ".\hc_dfcd_protocol.dsn" "SCHEMATIC1" "01_MCU"))
+    (HierarchyView)
+    (Doc
+      (Type "COrCapturePMDoc")
+      (Frame
+        (Placement "44 2 3 -1 -1 -8 -31 0 200 0 150"))
+      (Tab 0))))
diff --git a/docs/power_board_upgrade_issues_and_plan.md b/docs/power_board_upgrade_issues_and_plan.md
new file mode 100644
index 0000000..1063714
--- /dev/null
+++ b/docs/power_board_upgrade_issues_and_plan.md
@@ -0,0 +1,167 @@
+# 功率板升级问题与修改计划
+
+## 1. 升级链路
+
+```text
+上位机
+  ↓
+协议板 App
+  ↓ 进入升级指令
+协议板南向 UART
+  ↓
+功率板 Boot
+  ↓ 0x06、0x43
+协议板 App
+  ↓
+上位机
+进入升级控制帧：
+03 06 00 0F 00 FF F8 6B
+跳转 App 控制帧：
+03 06 00 0F 00 0F F8 2F
+功率板 Boot 使用裸 BIN + YModem 接收升级数据。
+2. 已确认的问题
+2.1 协议板发送日志含义不准确
+协议板日志：
+[UPG] CTRL ENTER try=1 tx=0
+tx=0 只表示发送请求已经提交到南向升级发送流程，不能证明 UART 已经在物理线上发送成功。
+需要通过串口逻辑分析仪确认实际线路是否出现完整控制帧。
+2.2 功率板 Boot 控制帧接收依赖一次完整 DMA 回调
+当前 Boot 主要在以下条件同时满足时识别进入升级帧：
+received_len == 8
+usart1_dma_rx_buf[0] == 0x03
+UPDATE_FRAME_MATCH
+如果控制帧被 DMA 空闲中断拆成多次接收，当前逻辑可能无法在拼接完成后重新判断控制帧。
+2.3 功率板 Boot 只有擦除成功后才发送应答
+处理流程：
+收到完整控制帧
+  ↓
+Flash_Erase_App_Region()
+  ↓
+擦除成功：发送 0x06、0x43
+擦除失败：发送 0x15
+因此：
+- 完全没有响应：优先检查 UART 接收、帧匹配、通道切换和线路；
+- 返回 0x15：重点检查 Flash 擦除；
+- 返回 0x06 但协议板没有收到：检查南向返回线路和协议板接收线程。
+2.4 Flash 分区注释与实际大小不一致
+当前配置：
+APP_FLASH_BASE_ADDR = 0x08003800
+APP_FLASH_SIZE      = 0x0000B000
+0xB000 实际为 44 KB，而代码注释写成了 40 KB。
+同时擦除配置为：
+NbPages = 22
+PAGE_SIZE = 0x800
+22 页也是 44 KB。需要确认这是否符合实际功率板 Flash 分区规划。
+2.5 南向通道和收发方向需要单独确认
+协议板升级前会执行：
+chrg_south_switch(ch)
+串口发送前后还会切换 RS485 收发方向。通道选择错误、方向控制延迟不足或线路未接通，都可能导致功率板无法收到控制帧或协议板收不到 0x06。
+3. 修改计划
+3.1 完善功率板 Boot 控制帧接收
+在 DMA 接收回调中：
+1. 累积多次接收到的数据；
+2. 达到 8 字节后统一匹配进入升级帧和跳转帧；
+3. 匹配成功后设置对应 pending 标志；
+4. 匹配失败时清理缓存并等待下一帧；
+5. 增加接收长度和帧内容调试输出，或使用 GPIO 翻转辅助定位。
+3.2 完善协议板发送状态
+协议板需要区分：
+- 发送请求提交成功；
+- UART 实际发送完成；
+- 功率板返回 0x06；
+- 功率板返回 0x15；
+- 等待超时。
+日志中应明确打印实际发送长度和发送帧内容。
+3.3 完善应答重发机制
+控制帧和 YModem 数据帧均应保留最近一次发送内容：
+- 等待 ACK 超时后重发；
+- 收到 NAK 后重发；
+- 超过最大重试次数后退出升级；
+- 收到 CAN 后立即中止；
+- 半帧超时后清理接收缓存并等待下一帧。
+3.4 核对 Flash 配置
+需要确认：
+- 功率板 MCU 型号；
+- Flash 页面大小；
+- Boot 起始地址；
+- App 起始地址；
+- App 最大容量；
+- Boot 工程链接地址；
+- App 工程链接地址；
+- YModem 文件最大长度。
+确认后统一修正宏定义、擦除页数和注释。
+3.5 保持升级状态期间停止普通南向轮询
+进入升级模式后：
+- 停止普通 Modbus 轮询；
+- 锁定目标功率板通道；
+- 只转发控制帧、YModem 数据帧和单字节应答；
+- 升级结束或失败后恢复普通轮询。
+4. 待验证项目
+4.1 控制帧发送
+使用逻辑分析仪确认协议板实际发送：
+03 06 00 0F 00 FF F8 6B
+确认：
+- 波特率为 115200；
+- 数据格式为 8-N-1；
+- 通道选择正确；
+- RS485 发送方向正确；
+- 帧没有被截断。
+4.2 功率板接收
+在功率板 Boot 的：
+HAL_UARTEx_RxEventCallback()
+检查：
+Size
+usart1_dma_rx_buf[0..7]
+期望：
+Size = 8
+03 06 00 0F 00 FF F8 6B
+4.3 功率板帧处理
+确认以下变量和流程：
+g_update_prepare_pending = 1
+Check_Updata()
+Ymodem_HandleControlFrame()
+Flash_Erase_App_Region()
+记录 Flash 擦除返回值。
+4.4 功率板应答
+确认功率板 UART 线上依次发送：
+06 43
+其中：
+- 0x06 表示控制帧处理成功；
+- 0x43 表示进入 YModem 接收等待。
+4.5 协议板接收
+确认协议板南向接收线程能识别：
+0x06
+0x15
+0x43
+0x18
+并将应答正确放入 YModem 应答队列。
+4.6 YModem 数据传输
+确认：
+- 上位机发送的是裸 BIN；
+- 首包为 YModem 元数据包；
+- 数据包号连续；
+- 功率板每包返回 0x06；
+- 丢包或 CRC 错误时返回 0x15；
+- 重发后包号状态正确；
+- EOT 流程能够正常结束。
+4.7 异常场景
+需要测试：
+- 控制帧拆包；
+- 控制帧丢失；
+- 0x06 丢失；
+- YModem 数据包丢失；
+- YModem 数据包 CRC 错误；
+- 升级中途断电；
+- 升级中途复位；
+- BIN 文件超过 App 分区；
+- Flash 擦除失败；
+- 跳转帧发送失败。
+5. 暂停调试时的结论
+当前暂不进行硬件调试。后续恢复调试时，优先使用逻辑分析仪确认以下最小链路：
+协议板发送控制帧
+→ 功率板 DMA 收到 8 字节
+→ 功率板识别控制帧
+→ Flash 擦除成功
+→ 功率板发送 0x06
+→ 协议板接收到 0x06
+只有这条链路确认成功后，再继续验证 YModem 数据包传输。
\ No newline at end of file