Files
chrg/docs/Allegro.jrl
T
wrh 4a79d9a4de feat: 发布V1.1.35版本,
北向轮询无回码让行逻辑
当空载时电流显示为0
1.  修改chrg_comm.c:更新协议板固件版本为0x0133,新增Source初始化事务保护逻辑
2.  修改chrg_roll_nor.c:优化北向轮询机制,单次请求超时后直接切换通道
3.  修改chrg_eload.h/c:新增小电流归零阈值宏,实现功率板小电流采样归零处理
4.  更新chrg_def.h版本号为V1.1.35
5.  更新修改日志文档,补充V1.1.33~V1.1.35版本更新内容
2026-09-21 19:33:37 +08:00

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\t (00:00:28) Allegro 17.2 S079 Windows SPB 64-bit Edition
\t (00:00:28) Journal start - Sun Sep 20 09:40:58 2026
\t (00:00:28) Host=DESKTOP-5RA9F3K User=Adminuser Pid=2796 CPUs=20
\t (00:00:28) CmdLine= D:\Cadence\SPB_17.2\tools\bin\Allegro.exe D:\HC-PMP-SW\Power_ControlPannel\MP_Control_sw_405\HC_DFCD\HC_DFCD_LCD_V_1.0\docs\HC_DFCD_LCD_V2_0(1).brd
\t (00:00:28)
\d (00:00:28) Design opened: D:/HC-PMP-SW/Power_ControlPannel/MP_Control_sw_405/MP_SW_Chrg/chrg/docs/HC_DFCD_Protocol_V3_0.brd
\i (00:00:28) generaledit
\i (00:00:28) zoom out 1
\i (00:00:28) setwindow pcb
\i (00:00:28) zoom out 18.0833 55.1949
\i (00:00:28) trapsize 5515
\i (00:00:29) zoom out 1
\i (00:00:29) setwindow pcb
\i (00:00:29) zoom out 18.3039 52.8786
\i (00:00:29) trapsize 11030
\i (00:00:29) zoom out 1
\i (00:00:29) setwindow pcb
\i (00:00:29) zoom out 58.3881 52.4375
\i (00:00:29) trapsize 22060
\i (00:00:29) zoom out 1
\i (00:00:29) setwindow pcb
\i (00:00:29) zoom out 217.2174 50.6728
\i (00:00:29) trapsize 44119
\i (00:00:29) zoom out 1
\i (00:00:29) setwindow pcb
\i (00:00:29) zoom out 535.3173 195.5990
\i (00:00:29) trapsize 88239
\i (00:00:29) zoom in 1
\i (00:00:29) setwindow pcb
\i (00:00:29) zoom in -61.1751 55.2998
\i (00:00:29) trapsize 44119
\i (00:00:30) zoom in 1
\i (00:00:30) setwindow pcb
\i (00:00:30) zoom in -42.6449 29.7106
\i (00:00:30) trapsize 22060
\i (00:00:30) zoom in 1
\i (00:00:30) setwindow pcb
\i (00:00:30) zoom in -42.6449 29.7107
\i (00:00:30) trapsize 11030
\i (00:00:30) zoom in 1
\i (00:00:30) setwindow pcb
\i (00:00:30) zoom in -41.3213 29.7107
\i (00:00:30) trapsize 5515
\i (00:00:32) drag_start grid -14.2983 71.4034
\i (00:00:33) drag_stop -24.7766 57.2852
\i (00:00:33) zoom out 1
\i (00:00:33) setwindow pcb
\i (00:00:33) zoom out 18.5706 69.5283
\i (00:00:33) trapsize 11030
\i (00:00:42) zoom in 1
\i (00:00:42) setwindow pcb
\i (00:00:42) zoom in 93.0217 64.4546
\i (00:00:42) trapsize 5515
\i (00:00:52) zoom out 1
\i (00:00:52) setwindow pcb
\i (00:00:52) zoom out 72.8372 58.1677
\i (00:00:52) trapsize 11030
\i (00:02:28) exit
\t (00:02:29) Journal end - Sun Sep 20 09:42:59 2026